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| 01:17 | Bertl_oO | off to bed now ... have a good one everyone!
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| 08:03 | se6astian | good day
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| 09:34 | mrohit[m] | good day se6astian
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| 09:35 | mrohit[m] | Hey BAndiT1983 , can you tell me what is the cooked.sh script doing exactly
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| 09:38 | mrohit[m] | * cooked .sh
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| 18:51 | apurvanandan[m] | Hi Bertl, In the project USB3.0 controller, once the controller for FT601Q is written in MACHXO2, where will we direct the data output from MACHXO2?
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| 18:51 | apurvanandan[m] | Will it be sent by packet protocol to main fpga?
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| 18:52 | apurvanandan[m] | ZYNQ Z7020
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| 18:53 | anuejn | I think you missunderstood it a bit
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| 18:53 | apurvanandan[m] | Please clear it
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| 18:53 | apurvanandan[m] | to me
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| 18:53 | anuejn | the task is about *reciving* data from the zynq and sending it via usb to a connected computer (mainly)
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| 18:56 | apurvanandan[m] | Oh sorry, I misinterpreted it.
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| 18:56 | felix_ | https://github.com/enjoy-digital/pcie_screamer/blob/master/gateware/ft601.py might be worth a look for the ft60x interface. not sure how different the ft602 is from the ft601, but i'd expect that the only difference is the firmware
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| 18:57 | apurvanandan[m] | Actually there is much of verilog code available for FT601Q controller
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| 18:57 | apurvanandan[m] | I am reading and understanding those
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| 18:59 | apurvanandan[m] | So basically the task is just to send some test data from MACHOX2 and receive it correctly at the USB3.0 end?
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| 19:04 | apurvanandan[m] | or we would have some video data for this project because as far as I know, the communication protocol between the fpgas is not implmented yet
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| 19:04 | apurvanandan[m] | Am I right?
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| 19:08 | anuejn | no, I would interpret the task in a way, that requires sending video data
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| 19:09 | anuejn | without integration into the existing gateware, all that work would be much less useful imho
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| 19:10 | apurvanandan[m] | So how are we getting the video data from ZYNQ to MACH?
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| 19:11 | anuejn | well... that is the task, I guess
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| 19:12 | anuejn | you basically have 6 LVDS lanes and some (8) single ended ios
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| 19:12 | anuejn | which are routed in the plugin modules
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| 19:13 | anuejn | it might be easier to not use the single ended IOs bc. they are connected to andother machox2 (the routing fabric)
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| 19:13 | felix_ | i'd either just use the hdmi output or use some sort of fifo interface over the differential pairs
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| 19:14 | anuejn | the routing fabric is lacking a finished firmware atm (see https://lab.apertus.org/T731)
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| 19:14 | anuejn | felix_:
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| 19:14 | anuejn | using the hdmi seems like a dirty hack to me
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| 19:14 | apurvanandan[m] | So is there some module currently on ZYNQ that sends video data on LVDS
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| 19:14 | apurvanandan[m] | ?
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| 19:15 | anuejn | and it does not allow for streaming raw data
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| 19:15 | anuejn | so a fifo interface would be much nicer imho but also more work
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| 19:16 | apurvanandan[m] | fifo between the fpgas?
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| 19:16 | anuejn | apurvanandan[m]: no fifo interface or anything like that. only hdmi
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| 19:17 | felix_ | sure, the fifo interface would be the better option, but the hdmi interface only requires work at one end and would work for up to 1080p60
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| 19:17 | anuejn | true
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| 19:17 | apurvanandan[m] | HDMI work on ZYNQ would have been already implemented no?
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| 19:18 | anuejn | but we need some other interface at some point of time anywas, so why not do it now ;)
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| 19:18 | anuejn | apurvanandan[m]: yes, the beta can already output hdmi
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| 19:19 | apurvanandan[m] | So we have two option either send by fifo to fifo or implement hdmi to fifo on MACHXO2?
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| 19:20 | apurvanandan[m] | FT601Q also receives fifo
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| 19:21 | anuejn | yup
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| 19:23 | apurvanandan[m] | We don't have place to connect the USB module directly to ZYNQ as two MACHXO2 will be connected already? Am I right?
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| 19:42 | apurvanandan[m] | The use of HDMI out from Zynq is only for testing purpose of the project no?
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| 19:42 | apurvanandan[m] | Later on you will use bidirectional packet protocol ?
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| 20:19 | felix_ | the 8 single ended io pins on the axiom connector connect to the machxo2 on the camera; the 6 differential pairs connect dorectlt to the zynq. on the usb video module there's another machxo2 that sits between the ft602 (not 100% sure if it already is the 602 or still the 601 chip tbh) chip to deserialize the data from the zynq to feed it into the ft60x
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| 20:20 | felix_ | the main video data flow is unidirectional (from the camera to the ft60x)
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| 20:21 | felix_ | T731 is for the protocol between the zynq and the two machxo2 on the camera board and not the extension modules
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| 21:01 | apurvanandan[m] | Ok I got the idea
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| 21:02 | apurvanandan[m] | Is there something like a block diagram for whole system , so that I can get a better picture.
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| 21:15 | vup2 | for a very high level overview you can take a look at these two: https://wiki.apertus.org/index.php/AXIOM_Beta/Manual#Image_Acquisition_Pipeline
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| 21:16 | se6astian | changed nick to: se6astian|away
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| 21:16 | vup2 | but for anything more detailed i think you'll have to look at https://github.com/apertus-open-source-cinema/axiom-beta-firmware/blob/master/peripherals/soc_main/top.vhd
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| 21:16 | vup2 | and the related files
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| 21:36 | BAndiT1983 | changed nick to: BAndiT1983|away
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| 21:59 | apurvanandan[m] | Ok thanks, what I didn't knew was there 2 lattice in main board and also lattice on plugin modules
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| 22:58 | aSobhy | hello Bertl :D
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| 22:59 | aSobhy | I have optimized my last code and changed the target fpga to max10
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| 23:00 | aSobhy | after optimization the speed reached 690 MHZ
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| 23:01 | aSobhy | but I dont know if that OK as on maxV you told me the emax speed is 300, So I am asking what is the minimum speed should I reach
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| 23:03 | aSobhy | *max speed*
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| 23:08 | aSobhy | Sorry for the long delay but the midterms had began :)
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| 23:21 | Bertl_oO | 690 MHz on max10 sounds fine to me ... care to do any post implementation simulation and add the data as VCD file?
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| 23:22 | Bertl_oO | (runnign at 600MHz for example)
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| 23:24 | apurvanandan[m] | Hi Bertl
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| 23:24 | apurvanandan[m] | :)
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| 23:51 | Bertl_oO | hey
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| 23:54 | Bertl_oO | just to clarify the confusion about the USB 3.0 module:
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| 23:54 | Bertl_oO | the hardware can work perfectly fine in both directions, so it would be possible to use one USB 3.0 plugin for input and the other one for output
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| 23:55 | Bertl_oO | but the main focus of all the plugin modules is getting (sensor) data out of the camera
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