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#apertus IRC Channel Logs

2021/03/30

Timezone: UTC


01:00
pani
Ok so because there is a huge speed difference between the FPGAs this setup is the one that works out for the requirements for the AXIOM Beta?
01:01
pani
Also as a reference I am a bit unsure how Challenge Task 2 is helpful for this idea, I do see how the Challenge Task 1 and Challenge Task 2 are relevant
01:01
Bertl
yes, most of the IOs/protocols which will be active over the MachXO2s are really low speed, think I2C < 1Mbit, SPI < 10Mbit
01:02
pani
I meant 1 and 3.
01:02
Bertl
ah, well, the challenge tasks are just to challenge you
01:02
pani
Okay
01:03
Bertl
so while 2 is on-topic, the others will also provide some insight for us about your coding/problem solving abilities
01:03
pani
So if the idea works out as intended what performance improvements does the AXIOM Beta get as a camera?
01:04
Bertl
currently most of the additional GPIOs are either not working or bit-banged from python scripts
01:05
pani
Ah so is that implemented from the PIC controller or the ARM on Zynq?
01:05
Bertl
so with the full routing fabric protocol in place, we would gain plugin identification, CSO communication like for the IMU, etc
01:06
Bertl
the PICs work just as programming/debug interface for the MachXO2s
01:06
pani
Ok so move a bunch of stuff directly to hardware?
01:06
Bertl
yep, and make it a lot faster and more flexible
01:08
pani
Hmm okay with my current level of understanding these are the questions I had, I will dive deeper into the documentation and code work on the Challenge tasks and come up with a proposal ASAP so that I can get reviewed by the community.
01:09
Bertl
excellent! if you have more questions, do not hesitate to ask!
01:11
pani
Also a bit of background about myself, I graduated with a BS in EE in 2017 worked for 18 months in Microchips FPGA Division, 6 months in a startup that worked on Computer Vision on FPGA, and a few months on a research project involving an FPGA. I will be starting as a Masters student in University of Minnesota Twin Cities in Fall 2021, and am interested in this project because I am excited to get a chance to work with SERDES
01:13
Bertl
sounds great! didn't know Microchip had an FPGA devision (or do you mean the recently acquired microsemi division)?
01:13
pani
Yeah
01:14
Bertl
ah, yeah, microsemi FPGAs always looked quite interesting, unfortunately the tools relly sucked
01:14
Bertl
(and that's something, considering that the competitor tools are quite bad :)
01:16
Bertl
a few years ago, the open source community approached the Microsemi folks and proposed an open source toolchain ... it almost happened back then, but unfortunately only almost :)
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02:48
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02:54
pani
I worked with the tools division Open source was never going to be an option
02:59
Bertl
interesting ... not sure why the microsemi folks then bothered discussing this in length
03:00
Bertl
but maybe this was a typical communication problem between different divisions
03:02
Bertl
anyway, was for sure interesting working there ...
03:19
pani
It is very simple reason
03:19
pani
Microsemi sells to defence contractors
03:19
pani
Defence contractors have some sort of requirement of not having things open source
03:20
pani
Same goes for Xilinx and Intel too.
03:20
pani
Yeah most likely different divisions
03:22
pani
if their customers ask them to open source it then they would consider it.
03:22
Bertl
so defence contractors do not use GCC or Clang/LVMM for example?
03:22
pani
I am not exactly sure about the specifics tbh
03:23
Bertl
no problem, was just curious
03:23
pani
Things is though the tools are ridiculous
03:23
pani
HW folks are too used to the tools.
03:24
pani
For them getting the finished HW is more important. Struggling with tools is just part of the job
03:25
pani
They will take notice only if some team produces cool hardware in record time with open source tools
03:51
vnksnkr
Bertl: Could I know more about the current status of the breakout board ? How should I be interfacing it with the routing fabric ?
03:52
Bertl
you mean the breakout board used for the remote?
03:52
vnksnkr
yes
03:52
Bertl
it is basically just an FPC to solder pads part
03:52
Bertl
i.e. no logic there not even passive components
03:53
Bertl
the setup is like this:
03:54
Bertl
there is the Axiom Remote, our remote control device for the camera
03:54
Bertl
it has a bunch of buttons and dials on it, as well as a display
03:55
Bertl
https://wiki.apertus.org/index.php/AXIOM_Remote
03:56
Bertl
https://www.apertus.org/sites/default/files/axiom-remote-top_0.jpg
03:56
Bertl
this is roughly how the PCB looks like (at least for the original prototype)
03:56
Bertl
now we wanted to make this Remote, remote testable ;)
03:57
Bertl
i.e. add a remote control for the Axiom Remote ...
03:57
Bertl
the simplest approach to this was to hook up a bunch of mosfets to each button, switch and rotary encoder
03:58
Bertl
so that they can be 'pressed' electronically
03:58
Bertl
and because we didn't want to integrate the mosfets on the Axiom Remote itself (although that might have been an option)
03:58
Bertl
we decided to put the Mosfets on a shield
03:58
Bertl
which is simply attached to an Axiom Beta (camera)
03:59
Bertl
so the Axiom Beta can now, using the routing fabric IOs, 'press' buttons and 'turn' knobs on the Axiom Remote
04:00
Bertl
the breakout board is just so that we can solder wires to the buttons and encoders which connect the mosfets from the shield, via the flat cables
04:01
Bertl
so the breakout board is simply screwed onto the bottom of the Axiom remote, and wires are soldered between the breakout board and the buttons, encoders, switches on the Axiom Remote
04:02
Bertl
then the breakout board is attached via the flat cables to the shield
04:02
Bertl
does that make sense now?
04:05
vnksnkr
yes it does a lot : ) ...sorry for the trouble..got confused as to how the breakout board was connected..
04:06
Bertl
no problem, it's not easy to imagine if you do not see the setup
04:06
Bertl
I probably should take some pictures to illustrate it
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BAndiT1983|away
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07:14
Bertl
off to bed now ... have a good one everyone!
07:15
Bertl
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09:33
lambamansha
GSOCâ21 WebUI task list
09:33
lambamansha
Task 1:Change the architecture of the WebUI so that the frontend cant execute arbitrary code on the camera any more
09:33
lambamansha
Task 2: Implement a WIFI configuration UI using NetworkManager
09:33
lambamansha
->Change Hotspot Name / Password
09:34
lambamansha
->Scan for WIFI networks
09:34
lambamansha
->Connect to existing WIFI Network
09:34
lambamansha
09:34
lambamansha
Task 3: Implement password changing for the operator user
09:34
lambamansha
09:34
lambamansha
Task 4: Implement a browser-based terminal (using existing libraries) (guarded with some kind of login)
09:34
lambamansha
Task 5: Implement UI widgets for White balance & Gamma
09:34
lambamansha
Clarifications:I donât get exactly what needs to be done here.
09:34
lambamansha
Task 6: Implement UI for taking still photos with the Beta & Downloading them
09:34
lambamansha
Clarifications:I donât get exactly what needs to be done here.
09:34
lambamansha
Task 7: Implement A Hardware Overview Page that shows revisions of different the different board installed
09:34
lambamansha
Clarifications:I donât get exactly what needs to be done here.
09:34
lambamansha
vup Please help me understand task 5,6 and 7
09:35
se6ast1an
hi lambamansha!
09:35
se6ast1an
did you already read the wiki camera documentation
09:35
se6ast1an
like related to settng gamma: https://wiki.apertus.org/index.php/AXIOM_Beta/Manual#Setting_Gamma_Values ?
09:36
se6ast1an
and https://wiki.apertus.org/index.php/AXIOM_Beta_Firmware_Version_2.0
09:41
BAndiT1983
Task 7: a list of the versions of installed boards in the camera, can probably be retrieved via a shell command
09:41
BAndiT1983
Task 6: UI with button/s to take snapshots, maybe also a list to present the files to the user for download
09:42
BAndiT1983
Task 5: maybe sliders with additional visualisation of value, example https://encrypted-tbn0.gstatic.com/images?q=tbn:ANd9GcQ-U-qEulLlrzJi0Tyo4ui-SMLoLSoZen-l97DSE4YrBY55J1R18bPiSyGEyl4as3xfdA&usqp=CAU
09:43
BAndiT1983
this is probably the more common for white balance: https://cam.start.canon/de/C003/manual/html/screens/UG-03_s0740.png
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13:29
vup
lambamansha: pretty much what BAndiT1983 said, adding maybe a image preview for Task 5 or 6
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14:43
Bertl_zZ
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14:44
Bertl
morning folks!
14:48
hp_dopeman[m]
good morning ð
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