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| 01:41 | Bertl | off to bed now ... have a good one everyone!
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| 11:20 | Bertl | morning folks!
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| 13:38 | surami | hey!
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| 14:12 | surami | would it be possible to connect a coaxpress board to the Beta somehow? i'm just reading about that technology
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| 14:13 | Bertl | yes, it would be possible
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| 14:15 | surami | here is a document about the chipset: http://ww1.microchip.com/downloads/en/DeviceDoc/60001302A.pdf
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| 14:16 | Bertl | well, that's an equalizer sec
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| 14:16 | Bertl | *set
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| 14:16 | Bertl | it is important for the cable part, but it still requires the actual Coaxpress interface
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| 14:17 | surami | oh, i see
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| 14:18 | Bertl | but the interface is basically SDI, so not that problematic
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| 14:18 | Bertl | I would suggest adding the link to the lab or wiki though
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| 14:19 | surami | ok, i will
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| 14:20 | surami | some weeks ago here were somebody, who could
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| 14:20 | surami | help you out with a framegrabber design
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| 14:20 | danieel | Bertl: cxp and sdi share about as much as pcie and sdi :)
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| 14:24 | Bertl | as you know all the electrical interfaces and the protocols very well, you might want to document them on the wiki :)
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| 14:27 | danieel | what for? a comparison table might be handy, but if you want to know the interface, the best is to read its standard... otherwise a lot of false information gets mixed in
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| 14:27 | Bertl | linking to those standards would be benefitial there
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| 14:28 | danieel | the issue is that some are non free - that would need to be solved first
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| 14:28 | danieel | (at least the SD has a free variant - without UHS)
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| 14:28 | Bertl | well, link to the free ones then, and note for the others that they a non-free
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| 14:29 | danieel | well.. i am not sure if there is any really free one - one that can be used without being part of a certification group
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| 14:31 | danieel | the specs about interfaces - most of them are on wikipedia, is there a need to double that info?
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| 14:32 | Bertl | all standards can be used without being part of a certification group
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| 14:32 | Bertl | there is no such thing as a forbidden standard
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| 14:32 | danieel | how do you obtain a VID then ?
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| 14:33 | Bertl | yes, obviously there is a need to collect this information, as wikipedia does not list the electrical and encoding specs in a neat table somewhere
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| 20:03 | surami | Bertl: what about Camera Link HS?
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| 20:04 | surami | or Camera Link "Full" mode?
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| 20:05 | Bertl | what about it?
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| 20:08 | surami | i meant a custom designed camera link board attached to the Beta
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| 20:08 | Bertl | yes, would also be possible
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| 20:24 | surami | so this different protocols could be connected to the left/right side io shields?
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| 20:24 | surami | i don't understand technically
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| 20:25 | surami | or there will be a highspeed protocoll on the Beta?
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| 20:25 | Bertl | there is a high speed shield, and a general purpose I/O shield
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| 20:26 | Bertl | the high speed shield will at least connect 16 LVDS pairs with at least 1GBit/s per lane
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| 20:27 | Bertl | this can be used to to connect certain interfaces directly and other interfaces via high speed serializer/deserializers
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| 20:29 | surami | well I have to search things on the net to understand this :)
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| 20:29 | surami | but thank for the explanation
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| 20:30 | Bertl | no problem, let me know if you need more information
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| 21:08 | surami | good night!
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| 21:28 | Bertl | welcome rhavan!
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| 22:42 | surami | how much hdmi ports will be on the Beta and what type?
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| 22:44 | surami | i'm thinking again on the 4k raw capture
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| 22:44 | surami | if the 3 color channels could be delivered separetly
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| 22:45 | surami | on 3 different hdmi ports
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| 22:45 | Bertl | we have a 3xHDMI shield planned, which would allow for FullHD on each port
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| 22:45 | surami | 60fps?
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| 22:46 | Bertl | should be doable, yes
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| 22:46 | surami | and hdmi 1.4?
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| 22:46 | surami | :)
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| 22:46 | Bertl | probably not, because HDMI 1.4 requires higher pixel clocks
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| 22:47 | Bertl | i.e. HDMI 1.4 adds 4kx2k modes
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| 22:48 | surami | so 1.2
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| 22:48 | Bertl | we plan to support a single high pixel clock HDMI shield
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| 22:48 | Bertl | that one will probably be HDMI 1.4
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| 22:49 | Bertl | yes, 165MHz (pixel clock) is most likely the maximum for the 3x HDMI shield
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| 22:49 | surami | the color channels could be separeted on the fpga side and delivered separatly to HDMI ports?
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| 22:49 | Bertl | yup
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| 22:53 | surami | if the raw data is "filtered"
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| 22:53 | surami | with 3 different channels
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| 22:53 | surami | r,g,b
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| 22:54 | surami | it would be only noise on a HDMI display?
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| 22:54 | surami | could the raw data separeted this way, 3 channels?
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| 22:55 | surami | or the raw data should be processed first?
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| 22:55 | surami | to do something on 3 channels?
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| 22:55 | Bertl | you do not even need to split it into r,g,b
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| 22:56 | Bertl | it's fine to send 3 sensel to the first HDMI out, 3 sensel to the second, 3 sensel to the third and so on and so forth
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| 22:56 | surami | sensel?
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| 22:56 | Bertl | (that's what we plan for recording 4k over 3xHDMI
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| 22:57 | Bertl | )
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| 22:57 | Bertl | sensel = photo sensitive element, can be R, G or B
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| 22:57 | Bertl | (in our case)
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| 22:57 | surami | aha
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| 22:58 | surami | so in theory with a capturecard this data could be transfered something visible?
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| 22:58 | Bertl | yup
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| 22:58 | surami | i mean 3 hdmi input
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| 22:58 | Bertl | as long as the capture card captures raw data without lossy compression
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| 22:59 | surami | i found a card
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