Current Server Time: 08:27 (Central Europe)

#apertus IRC Channel Logs

2019/06/28

Timezone: UTC

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intrac
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BAndiT1983|away
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BAndiT1983
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se6astian|away
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10:41
intrac
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12:18
Bertl_zZ
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12:18
Bertl
morning folks!
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12:22
aSobhy
morning Bertl
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13:00
Bertl
aSobhy: I'm missing any makefile or instructions how to build your code, care to add those including some simulation results?
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13:11
Bertl
apurvanandan[m]: you are missing copyright and license information in your source files, please add
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14:25
aSobhy
Ok I'm doing them
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14:27
sebix
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14:59
illwieckz
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illwieckz
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15:29
illwieckz
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15:37
apurvanandan[m]
Done!
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15:38
se6astian
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16:17
Bertl
apurvanandan[m]: tx
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16:27
BAndiT1983|away
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16:43
BAndiT1983
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16:53
illwieckz
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17:00
aSobhy
Bertl I have added a tcl file for the vivado
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17:07
Bertl
well, still way to go ... can't rebuild any of your HDL code
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17:08
aSobhy
is their a makefile exist I can follow ?
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17:09
Bertl
sure, there are plenty in the existing code, for both Vivado and Diamond
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illwieckz
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17:32
illwieckz
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17:40
aSobhy
changed it
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17:40
se6astian|away
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17:41
aSobhy
can you guide me what I'm missing ?
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17:42
Bertl
you are missing a way to rebuild your code into a bitstream
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17:42
Bertl
you can find make files for the Lattice MachXO2 here: http://vserver.13thfloor.at/Stuff/LATTICE/
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17:44
Bertl
and tcl scripts for Vivado here http://vserver.13thfloor.at/Stuff/AXIOM/BETA/cmv_hdmi3/
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17:44
aSobhy
and I'm editing at the vivado Tcl all that time
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17:45
illwieckz
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17:45
Bertl
so how do I rebuild the code from your repository?
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17:45
aSobhy
but the Mach side will not compile I were editing in the train file
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17:45
aSobhy
was*
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17:46
Bertl
btw, files are still missing copyright and license information
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17:47
Bertl
for what I can tell, they could all have been written by a Xilinx engineer and handed over under NDA :)
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18:02
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19:19
Bertl
off for now ... bbl
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19:19
Bertl
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21:43
se6astian
off to bed, good night
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se6astian
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22:44
Bertl_oO
off to bed now ... have a good one everyone!
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22:45
Bertl_oO
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23:02
intrac
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Y_G
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