Current Server Time: 05:44 (Central Europe)

#apertus IRC Channel Logs

2013/08/27

Timezone: UTC


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07:28
se6astian
good morning
07:29
se6astian
news posted
07:29
se6astian
https://www.apertus.org/axiom-alpha-milestone-article
07:32
dmj_nova1
se6astian: excellent
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09:43
se6astian
http://www.slashcam.de/news/kurz/Apertus-Axiom-Alpha---Es-geht-voran-220.html
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13:27
Bertl
morning everyone!
13:30
se6astian
hello!
13:35
se6astian
the propaganda machine is running at full speed already after the article was published ;)
13:35
se6astian
http://www.slashcam.de/news/kurz/Apertus-Axiom-Alpha---Es-geht-voran-220.html
13:36
se6astian
276 unique visitors today so far
13:43
Bertl
yeah, good to know that our camera mainboard is ready :)
13:48
se6astian
haha, yes its because its like a PC anyway
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19:13
dmj_nova1
Bertl: Any idea how to generate a 300 MHz clock on the zedboard?
19:53
Bertl
sure, several options actually
19:54
Bertl
you can use a PLL and the 100MHz clock rate (I have an example here)
19:54
Bertl
or you can use one of the FCLKs and adjust it to 300MHz
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Bertl
dmj_nova1: http://vserver.13thfloor.at/Stuff/AXIOM/pll_isim/
20:04
Bertl
the FCLK is already covered in the hdmi demos
20:11
Bertl
if you need help with the FCLK settings or the PLL configuration, just let me know
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