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#apertus IRC Channel Logs

2020/07/27

Timezone: UTC


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BAndiT1983|away
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16:55
se6ast1an
Meeting in 5 minutes
16:56
se6ast1an
I am stuck in traffic thought
16:56
se6ast1an
Will be late
16:56
se6ast1an
Asked bandit to moderate today
17:20
BAndiT1983|away
changed nick to: BAndiT1983
17:22
BAndiT1983
sorry am also late should we start with the meeting now?
17:22
BAndiT1983
*late,
17:36
se6ast1an
back now! that was a proper traffic jam!
17:36
se6ast1an
yes MEETING NOW!
17:37
se6ast1an
its Bertl_zZ birthday so he has earned a free day without us !
17:37
se6ast1an
but how are you progressing bluez_[m] metal_dent[m] apoorva_arora preetimenghwani[ BAndiT1983 vup anuejn ?
17:37
metal_dent[m]
happy birthday Bertl !!!
17:38
metal_dent[m]
se6ast1an: should we start or first DM you?
17:38
se6ast1an
metal_dent[m]: do you want to briefly share your last weeks progress?
17:38
se6ast1an
start right away please
17:38
metal_dent[m]
okay
17:38
bluez_[m]
Bertl: ouuu... happy birthday!!
17:39
BAndiT1983
ah, good to know: Happy Birthday, Bertl! keep up fresh to continue the camera work!
17:39
metal_dent[m]
So last week we had a demo session where we showed and explained our codes then gave a little demo, i also explained the obstacles which i've faced so far and if they have been yet solved or not
17:39
metal_dent[m]
rest of the week i mostly spent on debugging and testing
17:40
metal_dent[m]
we (me and BAndiT1983 ) also had a long debugging session where he too tested my code on his board
17:40
metal_dent[m]
that's it from me!
17:40
se6ast1an
nice, how was the demo session done? on irc?
17:41
metal_dent[m]
yes, in #gsoc2020 and we ran our codes in the zbox with shared screen
17:41
metal_dent[m]
it was fun and we got to know a lot about each other's projects
17:41
se6ast1an
great!
17:42
se6ast1an
many thanks
17:42
se6ast1an
bluez_[m]: do you want to seemlessly continue?
17:42
bluez_[m]
yup
17:42
se6ast1an
*seamlessly
17:43
bluez_[m]
so last week i improved the code a bit further.. added more abstract functions and also added sysfs entries to read out traceid and usercode from mxo2's
17:44
bluez_[m]
other than that i spent most of the time figuring out how to do the mux switching from within the driver... for this we are using an already existing mux driver
17:44
bluez_[m]
but i have been stuck at it for the whole week as for some reason my driver couldn't register through the multiplexed buses created by that mux driver
17:45
bluez_[m]
still debugging it...hopefully will find what's wrong soon :(
17:45
bluez_[m]
thats it from me!
17:45
se6ast1an
many thanks!
17:45
se6ast1an
apoorva_arora and preetimenghwani[ are you also here?
17:45
preetimenghwani[
Hey
17:45
se6ast1an
has anyone had contact with megora in the recent 2 weeks btw?
17:46
se6ast1an
preetimenghwani[: can you share youre recent week with us?
17:47
preetimenghwani[
Hello Everyone! So this week I implemented a reduced framework which has only those parts which are required for testing.
17:48
preetimenghwani[
I am currently working on extending the remapper to 64 channel mode.
17:49
preetimenghwani[
I am facing some problems in address generation part need to discuss that with Bertl.
17:49
preetimenghwani[
And yes A very Happy Birthday Bertl !
17:49
preetimenghwani[
Thats it from me!
17:50
se6ast1an
many thanks!
17:50
se6ast1an
apoorva_arora: are you also with us and ready to share progress?
17:50
se6ast1an
otherwise BAndiT1983 please be so kind and share your PCB panelization progress with us
17:51
BAndiT1983
hi everyone
17:51
BAndiT1983
as metal_dent[m] has already told, we were analyzing her trouble with gsoc project and remote firmware a few times last week
17:52
BAndiT1983
am not worrying about the progress at all, as obstacles were expected and it's interesting to see which problems arise in the course
17:52
BAndiT1983
besides that i was continuing with the PCB panelisation script, which should contain 2 stages for now: first one will produces mixed PCB panel, second one big panel full of mixed subpanels
17:53
BAndiT1983
currently we have done most of the tasks, what's missing are the small lines with holes to break the subpanels from the main panel
17:53
BAndiT1983
you can see the latest result here: https://i.paste.pics/134d16ec161f6ae53fb2b7b4703a781d.png
17:54
BAndiT1983
hope to get the mouse bites, that's how the lines with holes are called, today or tomorrow, if the smart solution will fail, then i will just use plain and blunt brute force
17:54
BAndiT1983
that's it for me
17:54
se6ast1an
great, many thanks!
17:54
se6ast1an
very brief updates from me
17:55
se6ast1an
gave a pick and place training with the liteplacer (https://liteplacer.com/) that we sold to local hackerspace last week
17:55
se6ast1an
small help from me here and there with the panelization scripts which is great to see progressing so well, thanks BAndiT1983!
17:56
se6ast1an
vup and anuejn are coming to Vienna next week
17:56
se6ast1an
for a 2 week hackathon
17:56
se6ast1an
accomodation and arrival are organized now
17:57
se6ast1an
beside AXIOM Micro V3 and Firmware 2.0 there is also the task revolving around the AXIOM Remote <-> nctrl implementation
17:58
se6ast1an
so BAndiT1983 and metal_dent[m] please expect some discussion/communication about this soon
17:58
BAndiT1983
no problem, we have already seen where the problems on the remote arise and have some understanding if what is needed, more will come when actual data for firmware will be sent, as it will be split in chunks
17:58
se6ast1an
I will get the Ultra96 from Bertl soon to benchmark more SSDs but it did not happen today because bertl has too much birthday cake to eat
18:00
se6ast1an
thats it from my side, I hope I did not forget anything :)
18:00
metal_dent[m]
se6ast1an: sure, no problem!
18:00
se6ast1an
anyone else with feedback/topics to discuss/ideas,, anything to share?
18:00
vup
Some quick updates from me:
18:01
vup
I reworked the pdf export script for the eagle schematics, it now does two exports, one with selectable text and one with better looking vector graphics and then combines them, all schematics should now be updated to these new exports
18:02
vup
Also I created a script that parses all the registers on the zynq and parses the init sequence: https://files.niemo.de/microzed_ps7_init.dump
18:03
se6ast1an
ah yes, the updated pdfs have already been updated on files.apertus.org
18:03
se6ast1an
are the zyn registers also something we should put in wiki or fileserver somewhere?
18:04
vup
the plan is to use that to created a script that can generated the code used by u-boot to initalize the zynq ourselves instead of relying on vivado to do so
18:04
vup
and also to create tools that allow easy runtime changes to various configuartion options (like enabeling / disableing the 32 bit mode of the axi ports)
18:05
se6ast1an
ah, right, great!
18:05
vup
se6ast1an: I would wait a bit, this is currently just the first experiments, when the format is fixed and we actually start writing tools I think putting them on github and linking to there from the wiki would be a good idea
18:05
se6ast1an
noted
18:06
vup
thats it from me, happy birthday Bertl!
18:07
se6ast1an
thanks!
18:07
se6ast1an
anyone else?
18:08
se6ast1an
alright then, meeting concluded!
18:09
se6ast1an
many thanks everyone!
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BAndiT1983
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BAndiT1983|away
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