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| 03:24 | Bertl_oO | off to bed now ... have a good one everyone!
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| 08:40 | Bertl | morning folks!
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| 10:55 | Bertl | off for now ... bbl
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| 14:08 | maxbrsw | Hi, can I talk with Bertl?
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| 14:11 | Bertl_oO | probably :)
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| 14:12 | maxbrsw | Awesome :) My name is Max, couple days ago I sent message covering my willing to contribute to Apertus as PCB designer
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| 14:13 | se6astian | hi Max
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| 14:13 | se6astian | I just replied to you
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| 14:13 | se6astian | great you joined the channel immediately!
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| 14:13 | maxbrsw | Hi Sebastian, yeah I saw your message
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| 14:14 | maxbrsw | so what do you think about this?
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| 14:14 | se6astian | I think its great
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| 14:14 | se6astian | bertl created all the AXIOM Beta hardware so far
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| 14:15 | se6astian | he is your man for discussing what a subproject could be for you
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| 14:15 | se6astian | maybe a plugin module
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| 14:15 | maxbrsw | what software do you use for PCB design?
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| 14:15 | Bertl_oO | we mostly used Eagle for the current designs
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| 14:16 | Bertl_oO | (basically exclusively for Beta designs, but we plan to migrate to KiCad)
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| 14:16 | maxbrsw | Is something like Altium Designer and/or Cadencce Allegro acceptable? I own license for Altium
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| 14:17 | Bertl_oO | well, the problem with Altium is that the format is not documented/readable and the designs are not even viewable on other platforms like Linux or Mac
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| 14:18 | Bertl_oO | and if you want to change anything you need to pay big bucks as you probably know
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| 14:18 | Bertl_oO | so, working/designing with it is probably fine, but at some point you want to convert it to something more open source friendly
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| 14:19 | maxbrsw | sure, I understand this - maybe it's possible to use sort of 3d party format, something not CAD-specific?
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| 14:20 | Bertl_oO | if you figure out how to convert the designs to KiCad for example, then it shouldn't be a big deal and would be a nice solution
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| 14:20 | maxbrsw | let me investigate this
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| 14:21 | Bertl_oO | but as we do not want to spend the big bucks for a license and also I don't use Windows, we don't know what is available there
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| 14:22 | maxbrsw | well, from what I can see there are importers from Altium to Kicad (http://www.eevblog.com/forum/kicad/importing-altium-pcb-into-kicad/)
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| 14:22 | maxbrsw | probably there are even more fresh versions of it
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| 14:28 | maxbrsw | from what I found at the moment it looks like even schematics can be imported
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| 14:29 | maxbrsw | so what do you think about such workflow?
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| 14:33 | Bertl_oO | make sure it works fine, i.e. get a design you already did and convert it completely and check that everything is fine
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| 14:33 | Bertl_oO | if that turns out to give acceptable results, then this is a working way to proceed
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| 14:35 | maxbrsw | alright, I'll test those importers later today and get back to you with results
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| 14:36 | Bertl_oO | excellent!
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| 14:38 | maxbrsw | ok, I'm leaving for now to finish some stuff and then proceed with mentioned things- so I hope we will talk soon:) BB
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| 14:39 | Bertl_oO | cya and have fun!
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| 16:35 | kaiserlich | why are we migrating from eagle to kicad? (i've only ever heard of eagle, just looking up kicad)
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| 16:35 | Bertl_oO | KiCad is a very promising open source EDA solution
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| 16:36 | Bertl_oO | especially since CERN decided to actively contribute to the project
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| 16:36 | kaiserlich | ah!
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| 16:36 | Bertl_oO | https://home.cern/about/updates/2015/02/kicad-software-gets-cern-treatment
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| 16:37 | Bertl_oO | http://www.ohwr.org/projects/cern-kicad/wiki/WorkPackages
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| 16:38 | kaiserlich | thx!
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| 16:39 | Bertl_oO | np
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| 17:19 | maxbrsw | Hi again Bertl - we've discussed today possibility of Altium to Kicad export in context of possible PCB design contribution
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| 17:19 | Bertl_oO | yup
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| 17:20 | maxbrsw | I've tried couple things with Kicad and failed :)- don't have any idea how to even proceed with that sort of guide from existing import links
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| 17:20 | maxbrsw | also asked in Kicad IRC- they say, "it's difficult"
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| 17:21 | Bertl_oO | that was what I feared ... :/
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| 17:21 | maxbrsw | that was the most informative explanation I managed to get from that IRC xD
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| 17:21 | Bertl_oO | what I remember from the last time I read about it, that it requires the files to be written in a special ASCII version from altium
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| 17:22 | Bertl_oO | (in case that helps)
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| 17:22 | maxbrsw | what seems bad also- a fact that guys which somehow managed to proceed with import, the report about bags and missing copper
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| 17:22 | maxbrsw | yeah, but I can't even start opening :) maybe becasue I'm complete noob in Kicad, dunno
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| 17:26 | Bertl_oO | well, we won't stop you from contributing to the project because you use altium
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| 17:27 | Bertl_oO | but you should be aware that it doesn't make too much sense if only a slect few can view and edit your designs
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| 17:29 | Bertl_oO | also I do not think that it is a good choice to store design data in a proprietary format which is mostly unknown
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| 17:30 | Bertl_oO | (might easily get lost when altium decides to quit or similar)
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| 17:30 | maxbrsw | yes, I understand that - but probably it's worth to try, as I'm very proficient in Altium xD
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| 17:30 | maxbrsw | meaning format- ASCII may help, so EAGLE can understand it even taken from Altium
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| 17:38 | Bertl_oO | never tried an Altium import in Eagle
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| 17:39 | Bertl_oO | but that might work
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| 17:39 | Bertl_oO | maybe give that a try, we are working on an Eagle to KiCad export
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| 17:40 | maxbrsw | alright- so do you have any actual PCB designs to be handled?
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| 17:41 | Bertl_oO | there is a lot which can be worked on, for example we plan for a 4K HDMI out plugin module
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| 17:42 | Bertl_oO | somebody might be working on that though
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| 17:43 | Bertl_oO | but there are other areas as well, like for SDI
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| 17:44 | maxbrsw | whatever is required, I can start with anything that has highest priority or interest
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| 17:45 | Bertl_oO | are you already familiar with the existing designs?
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| 17:46 | maxbrsw | not too much I think- just brief previews
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| 17:47 | Bertl_oO | well, it would probably be a good start to get comfortable with it, as all the parts work together somehow and there is not much which can be completely separated
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| 17:47 | Bertl_oO | for plugins and shields the interfaces are crucial
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| 17:49 | Bertl_oO | an SDI plugin is for sure something nobody is currently working on and everybody would like to see :)
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| 17:49 | maxbrsw | so what will be the starting point? BTW, how collaborators are contacting each other? Do you have some "corporate standards" in design methodology, workflow etc.?
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| 17:50 | maxbrsw | may I now more about this SDI plugin :)?
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| 17:51 | Bertl_oO | we try to conform with plugins, shields and boards to the OSHpark 2/4 layer standard
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| 17:51 | Bertl_oO | so that folks around the world can easily get their hands on those boards without ordering large amounts in china
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| 17:53 | maxbrsw | I see - so these : http://docs.oshpark.com/services/, are design rules for PCB, right?
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| 17:53 | Bertl_oO | basically limitations on what you can do, yes
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| 17:54 | Bertl_oO | but if there is a real need for going beyond that, we can make an exception, especially for more expensive plugins or addons
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| 17:54 | Bertl_oO | the main communication medium is IRC
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| 17:55 | Bertl_oO | (e-Mail is also fine when it makes sense)
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| 17:55 | maxbrsw | alright, so meaning this I believe those design rules(and capabilities) from OSHpark are not for high-speed stuff, right?
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| 17:56 | Bertl_oO | depends on how you define high-speed stuff
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| 17:56 | Bertl_oO | after all, the entire Beta as it is now (except for the MicroZed development kit) works fine within the OSHpark limits
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| 17:57 | maxbrsw | DD3/4, PCIe Gen3 and so on- at least something that requires impedance control and length matching
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| 17:57 | Bertl_oO | well, length matching is not a problem with OSHpark
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| 17:58 | Bertl_oO | controlled impedance is, but if you calculate it correctly, the PCBs will not differ much between runs
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| 17:58 | Bertl_oO | but of course, you have to do the work on getting the impedance right
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| 17:58 | maxbrsw | I mean, generally many of high-speed rules are based on stakup info, but I don't see any stakups there on their site
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| 17:59 | Bertl_oO | http://docs.oshpark.com/services/four-layer/
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| 17:59 | maxbrsw | thanks, that answers my question
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| 18:00 | maxbrsw | how desings are submitted and reviewed? Do you use versions control system of any kind?
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| 18:03 | se6astian | joined the channel |
| 18:03 | Bertl_oO | we have a repository on github where we try to check in the designs when they are worked on by more than one party
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| 18:04 | Bertl_oO | of course, you can use whatever revision system you like when you work on your own
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| 18:04 | maxbrsw | gthub works good for me
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| 18:04 | maxbrsw | so how I can start?
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| 18:05 | Bertl_oO | for the SDI plugin, get intimate with the plugin interface and the size of those plugin modules
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| 18:06 | Bertl_oO | figure out how to convert the LVDS interface to proper (high speed) SDI and how to fit suitable connectors on the plugin module
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| 18:06 | maxbrsw | where I can get info about/project files this? It's in your repository?
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| 18:07 | Bertl_oO | the most recent information can be found here:
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| 18:07 | Bertl_oO | http://vserver.13thfloor.at/Stuff/AXIOM/BETA/
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| 18:08 | Bertl_oO | check out the main board (v0.36 r1.2) for the plugin interface
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| 18:08 | Bertl_oO | check out the 1xHDMI and 3xPMOD plugins for the plugin sizes and connections
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| 18:08 | Bertl_oO | (latest versions)
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| 18:22 | maxbrsw | ok, I looked at that stuff - about that SDI module, what's current status if it? Any constraints, requirements, schematic drafts?
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| 18:25 | Bertl_oO | nothing besides the plugin sizes and the interface
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| 18:26 | Bertl_oO | nobody started to work on that yet, so current status: planned
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| 18:28 | maxbrsw | asking because I'm not sure that after looking at those files my understanding of things required is clear enough
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| 18:29 | Bertl_oO | just ask if something is unclear
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| 18:32 | maxbrsw | What I managed to get(most likely) is that:
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| 18:33 | maxbrsw | 1)you have sort of board that is stacked with Microzed board 2) there are kind of expansion boards(modules)3) there should be kind of SDI expansion board
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| 18:33 | maxbrsw | if I'm not mistaken of course
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| 18:34 | maxbrsw | the rest is in dark :)
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| 18:41 | Bertl_oO | that's why I said you should get comfortable with the current design of the Beta first
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| 18:48 | maxbrsw | probably I could understand the main concept looking at this:http://vserver.13thfloor.at/Stuff/AXIOM/BETA/PCB-Stack-Concept-V03-02-nofan-50-Bertl.jpg
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| 18:48 | maxbrsw | but also expected complete details about desired fuctionality, pinout, constraints etc of that SDI module
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| 18:49 | maxbrsw | in relation to entire system of course
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| 18:54 | se6astian | hi derek!
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| 18:55 | derek-plethora | Hello
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| 18:55 | se6astian | great to see you here
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| 18:55 | derek-plethora | Yeah! sorry it took me so long.
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| 18:55 | se6astian | no worries
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| 18:55 | derek-plethora | I was just talking to my prototype machinist about your project.
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| 18:56 | se6astian | actual perfect timing as I just returned to the pc :)
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| 18:56 | derek-plethora | We want to machine a housing for my camera body this week that could hold your hardware.
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| 18:57 | se6astian | excellent!
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| 18:57 | se6astian | did you download the 3d files from github already?
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| 18:58 | se6astian | some things with the enclosure design are not obvious
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| 18:58 | davidak | Bertl_oO: do tools like Kicad have a functionality to reorganize components to improve the design and reduce wire straps?
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| 18:59 | derek-plethora | I was just checking out the github
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| 19:06 | se6astian | it would actually be a great idea if you could cover the groundwork for others who want to design a custom enclosure
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| 19:06 | se6astian | collecting the files together, creating a wiki page what to keep in mind
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| 19:06 | se6astian | collecting links, dimensions, requirements
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| 19:06 | se6astian | in case this is something you would want to do?
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| 19:09 | derek-plethora | Yeah I can work on that
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| 19:09 | se6astian | great
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| 19:09 | derek-plethora | Is see the 'beta-hardware' branch, are there any others?
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| 19:09 | se6astian | no thats the right one
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| 19:09 | se6astian | under enclosure
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| 19:10 | se6astian | the simple design is https://www.apertus.org/sites/default/files/AXIOM-Beta-Simple-Enclosure-Explosion01.jpg
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| 19:15 | derek-plethora | Im cloning the branch onto my machine now, brb
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| 19:23 | se6astian | great
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| 19:23 | se6astian | the folder structure is a bit confusing
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| 19:23 | se6astian | version 2, skeleton, simple enclosure, etc....
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| 19:23 | se6astian | but thats how it always ends up when you create new revisions, new branches, different approaches, etc :)
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| 19:25 | derek-plethora | What was the motivation for this project?
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| 19:28 | se6astian | https://www.apertus.org/history
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| 19:28 | se6astian | https://www.apertus.org/about
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| 19:32 | Bertl_oO | changed nick to: Bertl
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| 19:33 | derek-plethora | haha, touche
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| 19:33 | Bertl | davidak: you mean auto placement?
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| 19:33 | derek-plethora | I guess, I meant more personal motivations? but I'll digest this more.
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| 19:33 | davidak | yes
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| 19:33 | Bertl | davidak: that is something which never works well and typically results in very bad designs :)
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| 19:33 | davidak | i think a computer might could do that better than humans
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| 19:34 | Bertl | you can see how problematic this is with FPGA tools
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| 19:34 | Bertl | the main problem is that the computer/program doesn't have all the information
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| 19:34 | davidak | maybe SI could solve that someday
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| 19:35 | davidak | AI
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| 19:35 | Bertl | yep, probably ... you can try it yourself with the autorouter on existing designs
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| 19:35 | Bertl | i.e. it is easy to rip up a finished board, leave the components where they are and let the autorouter do its work
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| 19:36 | Bertl | the result is typically very sad :)
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| 19:36 | davidak | ok
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| 19:36 | Bertl | component placement is even more problematic and similar to chess/go the search space explodes very fast
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| 20:16 | Bertl | off for a nap ... bbl
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| 21:39 | se6astian | of to bed
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| 00:26 | Bertl | back now ...
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| 00:44 | derek-plethora | I'll just leave these here for now :D
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| 00:44 | derek-plethora | http://www.derekburgess.com/share/customcam/digi/digi_back.PNG
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| 00:44 | derek-plethora | http://www.derekburgess.com/share/customcam/digi/digi_back_4.PNG
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| 00:45 | derek-plethora | There are more images in there if you adjust the URL.
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| 00:57 | Bertl | nice
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