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| 03:27 | Bertl | off to bed now ... have a good one everyone!
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| 11:35 | Bertl_zZ | changed nick to: Bertl
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| 11:35 | Bertl | morning folks!
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| 11:44 | apurvanandan[m] | Good morning!
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| 11:59 | Bertl | hey, how's it going?
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| 12:23 | apurvanandan[m] | Not much, Just going through the codes and reading about new things.
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| 12:24 | Bertl | like for example?
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| 12:24 | apurvanandan[m] | Bertl I think major part of island data won't be required. Just info about the resolution needs to be sent which can be sent once in the starting. Am I right?
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| 12:25 | Bertl | are you talking about HDMI now?
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| 12:27 | apurvanandan[m] | I mean that island data is sort irrelevant to the usb module.
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| 12:27 | Bertl | ah, yes
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| 12:31 | Bertl | the information is still relevant, but no need to transfer the island data over USB
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| 12:31 | Bertl | i.e. there are different resolutions and color modes on USB as well
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| 12:32 | Bertl | but there is no point in using the convoluted island data for it
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| 12:32 | Bertl | in the UVC case, all this needs to be set for the FTDI
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| 12:32 | Bertl | in the raw data case, there needs to be some kind of header information
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| 13:11 | apurvanandan[m] | Bertl why is that the hdmi_ch0 to 3 go to color correction module before being encoded while hdmi_ch4 is directly sent to rgb encoder module?
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| 13:19 | Bertl | channel 0-3 contain the image data (R,G1,G2,B) while ch4 contains metadata
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| 13:21 | Bertl | (i.e. the overlay)
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| 13:23 | apurvanandan[m] | Oh I see, there is a overlay process for this.
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| 13:28 | Bertl | aSobhy: what's up on your side?
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| 14:11 | aSobhy | I'm taking a tour in lattice diamond
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| 14:14 | aSobhy | didn't download vivado yet but I'm trying
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| 14:17 | aSobhy | beside Study networks (just refreshment) :)
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| 14:17 | Bertl | ah, Lattice Diamond :)
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| 14:17 | Bertl | I remember that it was a little tricky first to find all the parts to run it from commandline
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| 14:18 | Bertl | I do not remember much else about it though
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| 14:21 | aSobhy | yeah collecting my commands to save them
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| 14:22 | Bertl | there is a make file for the routing fabric bitstream
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| 14:22 | Bertl | http://vserver.13thfloor.at/Stuff/AXIOM/BETA/LATTICE/
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| 14:22 | Bertl | (might come handy)
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| 14:26 | aSobhy | nice, seeing them now ^_^
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| 14:30 | apurvanandan[m] | Bertl, could you explain me what is this overlay here?
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| 14:33 | Bertl | sure, currently the sensor image data is burst into memory in a square four sensel arrangement
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| 14:33 | Bertl | i.e. a square of four sensel (R, G1, G2, B) with 12 bit each are stored together in a 64bit memory location
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| 14:34 | Bertl | 4x12 bit = 48bit which leaves 16bit 'unused'
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| 14:35 | Bertl | we decided to use this space for an overlay which affects the full HD pixels generated from the 2x2 sensel words
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| 14:36 | Bertl | if you look at overlay.vhd, there the 16bits are interpreted to form said overlay image
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| 14:37 | Bertl | two bits are used to control transparency, the other control color and there are special symbols for a blink effect
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| 14:38 | Bertl | (this happens outside of the overlay entity)
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| 14:49 | Bertl | the alpha mixing is done in overlay_proc in top.vhd
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| 14:50 | Bertl | well, looking at the code, everything is done in overlay_proc in the current version :)
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| 15:12 | Bertl | any further questions or all clear? :)
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| 15:13 | apurvanandan[m] | This part is clear , but more questions coming soon. ^^'
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| 15:15 | apurvanandan[m] | Earlier I was planning to use the lut after the color correction for doing the 8b/10b encoding but now I think hd_code is the signal to be sent over.
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| 15:17 | Bertl | for raw output, we definitely want unmodified raw data from the sensor
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| 15:18 | Bertl | i.e. the 12bit sensor data (R,G1,G2,B) without any LUT or color matrix
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| 15:18 | Bertl | for the UVC case, we have several options
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| 15:19 | Bertl | we can do color space conversion on the MachXO2 or we can do that in the ZYNQ fabric
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| 15:21 | apurvanandan[m] | So that means I will use the data coming from the fifo which is connected to axi hp reader.
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| 15:22 | Bertl | for raw output, yes
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| 15:31 | apurvanandan[m] | Great. Now it is more clear i.e. basically this fifo data needs to reach MachXO2. :)
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| 18:51 | Bertl | off for now ... bbl
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| 19:27 | Bertl | back again ...
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| 19:46 | Bertl | evening Nira!
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| 19:47 | Nira | Hello!
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| 19:47 | Bertl | How are you?
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| 19:54 | Nira | Great! Weekends always look so fast
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| 19:55 | se6astian | welcome back, how are you getting along with the code so far?
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| 19:57 | Nira | I'm reading PIC32 documentation now, I've been checking the code and I'm trying to understand what I don't know yet!
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| 22:05 | aSobhy | can I have a look at any VHDL code on both sides machxo2 and zinq ?
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| 22:07 | Bertl | there is some VHDL code for the Lattice which I linked not too long ago (check IRC logs for today)
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| 22:08 | aSobhy | also the past year their was a student working on the project as I submitted where do I get it
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| 22:08 | Bertl | https://github.com/apertus-open-source-cinema/axiom-beta-firmware/tree/master/peripherals
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| 22:08 | Bertl | here you can find the Zynq (soc_main) and MachXO2 (routing_east) examples
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| 22:10 | aSobhy | is the same code for both MachXO2 FPGAs
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| 22:33 | Bertl | at the moment we only have code in one routing fabric
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| 22:33 | Bertl | i.e. the other one is empty and jtag instructions are used to toggle pins :)
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| 22:55 | Bertl | off for now ... bbl
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| 23:06 | aSobhy | mmm okaaay
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