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#apertus IRC Channel Logs

2020/03/27

Timezone: UTC


00:05
electropositron
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00:12
electropositron
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01:48
Bertl_oO
off to bed now ... have a good one everyone!
01:48
Bertl_oO
changed nick to: Bertl_zZ
02:55
CandyWendy
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Spirit532
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06:03
Wanderer_99
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06:24
BAndiT1983|away
changed nick to: BAndiT1983
06:27
Wanderer_99
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07:11
bluez_[m]
Good morning everyone! Sorry Bertl I fell asleep yesterday ':D
07:12
bluez_[m]
> bluez_: looks good, maybe add your IRC nick as well :)
07:12
bluez_[m]
Oh I forgot to add that... will do... thanks!!
07:19
BAndiT1983
changed nick to: BAndiT1983|away
08:00
Shashwat
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08:01
Bertl_zZ
changed nick to: Bertl
08:02
Bertl
morning folks!
08:53
Wanderer_99
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Shashwat
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10:27
Shashwat
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10:56
omar31
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11:20
Wanderer_99
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11:22
BAndiT1983|away
changed nick to: BAndiT1983
11:23
preetimenghwani[
Hello bertl
11:23
preetimenghwani[
Can you provide me the link where i can read about the current memory storage and repacking.
11:27
Bertl
there is some general information here: https://wiki.apertus.org/index.php/AXIOM_Beta/Manual
11:29
Bertl
and you can dig into the HDL for the remapper here: https://github.com/apertus-open-source-cinema/axiom-beta-firmware/blob/master/peripherals/soc_main/pixel_remap.vhd
11:29
Bertl
note that the remapper only does the remapping not the packing, this happens in the top.vhd
11:35
preetimenghwani[
I actually had this confusion so for the task we dont have to perform repacking?
11:39
preetimenghwani[
Sorry for silly questions
11:43
Bertl
nothing to be sorry about
11:43
Bertl
the idea behind the 'new' remapper is to handle both
11:43
Bertl
i.e. reorder the pixels in such way that the follow certain rules
11:44
Bertl
and pack them into words which can be easily written to DDR memory
11:44
Bertl
note that these two can be separate units
12:07
Shashwat
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Shashwat
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12:24
RexOrCine
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13:05
preetimenghwani[
Okay thanks a lot Bertl :)
13:05
Bertl
np
13:29
Shashwat
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13:45
Wanderer_99
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13:47
Wanderer_99
Here is my old unanswered question what sort of serdes are we supposed to implement for t871 task 1?
13:47
Wanderer_99
Parallel clock, embedded clock, 8b/10b?
13:52
Bertl
Task 1 assumes a clock with fixed phase relation, so no clock recovery
13:53
Bertl
also, there is no coding mentioned there, so no 8b/10b (which would be hard to do with 10/12bit anyway)
13:56
Bertl
off for now ... bbl
13:56
Bertl
changed nick to: Bertl_oO
14:29
BellaRebella
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electropositron
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BellaRebella
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16:26
schmoggie
okay, got two logic analyzers on route and a nex7 and various lenses for cheap
16:26
schmoggie
analysing can being
16:26
schmoggie
s/being/begin/g
16:32
BAndiT1983
schmoggie: nice, looking forward to it
17:07
Wanderer_99
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17:11
se6ast1an
schmoggie: excellent!
17:18
RexOrCine1
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GabbyWest
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Shashwat
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apurvan
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apurvan
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GabbyWest
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Shashwat
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Shashwat
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19:01
YanetGarcia
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omar31
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Shashwat
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megora
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megora
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megora
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RexOrCine1
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BAndiT1983
changed nick to: BAndiT1983|away