Current Server Time: 23:26 (Central Europe)

#apertus IRC Channel Logs

2020/10/26

Timezone: UTC


06:08
BAndiT1983|away
changed nick to: BAndiT1983
06:09
Bertl_oO
off to bed now ... have a good one everyone!
06:09
Bertl_oO
changed nick to: Bertl_zZ
09:46
se6ast1an
good day
12:41
Bertl_zZ
changed nick to: Bertl
12:41
Bertl
morning folks!
12:48
anuejn
morning :)
13:15
vup
bluez_[m]: I think we have worked out openocd cross compulation for axiom-firmware, is there any wip patch or something like that we can include for the mxo kernel driver support?
13:15
vup
Bertl: ^
13:16
Bertl
I'm sure there is, bluez_[m] will have the latest version I guess
13:20
vup
oh also bluez_[m]: it would probably be interesting to start including the mxo kernel driver itself aswell :), what is the status of that?
13:22
Bertl
should be working but needs some minor changes to the rf-pic firmware
13:22
Bertl
(mostly to get rid of the 'setup' script)
13:27
vup
ok
14:53
mumptai
joined the channel
15:39
Bertl
off for now ... bbl
15:39
Bertl
changed nick to: Bertl_oO
16:00
dagmar[m]
left the channel
16:20
mumptai
left the channel
16:43
BAndiT1983
changed nick to: BAndiT1983|away
16:52
mumptai
joined the channel
16:55
se6ast1an
meeting in 5 minutes
16:56
se6ast1an
we had daylight saving time change so I hope that did not lead to confusion about meeting time
16:57
vup
oh right, thats why its so dark outside already :)
17:00
se6ast1an
:P
17:00
se6ast1an
meeting time!
17:00
se6ast1an
Bertl messaged me saying he will be a bit late this time
17:00
se6ast1an
who else is here?
17:00
vup
is here for a bit
17:00
se6ast1an
vup I see from github messages that there are a lot of things happening :)
17:00
Bertl_oO
changed nick to: Bertl
17:00
se6ast1an
can you give us a summary?
17:01
vup
sure
17:01
Bertl
is back ...
17:01
vup
so yesterday anuejn and me worked together a bit
17:02
vup
we finally made the openocd support work: https://github.com/apertus-open-source-cinema/axiom-firmware/pull/174
17:02
vup
so the firmware images now include (a up to date) openocd
17:03
vup
we currently use this together with the nmigen gateware experiments to program the usb3 plugin module on a micro for example
17:03
Bertl
whar's the openocd driver used for that?
17:03
se6ast1an
can you give us a 1 sentence explanation what openocd is?
17:04
vup
Bertl: sysfsgpio :)
17:04
Bertl
ah, nice
17:04
vup
se6ast1an: sure, openocd is something that provides on-chip programming and debugging support (primarily via jtag) for various devices
17:04
se6ast1an
thx
17:05
se6ast1an
sounds great!
17:05
vup
it can for example be used to program fpgas via jtag, or say debug a arm core via jtag
17:05
vup
hopefully we can include whatever changes are necessary to make openocd also work with the kernel driver that bluez_[m] has written to program the routing fabric machxo2's on the beta
17:06
vup
other than than, anuejn further worked on the nmigen gateware
17:06
vup
if anuejn is here he can report himself?
17:08
vup
otherwise, in summary, anuejn implemented a new / improved protocol that can be used over jtag to read / write registers defined in the gateware. This should now hopefully work on both lattice and xilinx fpgas.
17:09
Bertl
basically a custom chip scope version, if I got that correctly
17:09
vup
Bertl: not exactly
17:10
vup
it currently can just be used to read / write registers
17:10
Bertl
ah
17:10
vup
it has no logic analyzer stuff yet
17:10
vup
but building on this framework that should be easy to add
17:10
vup
and you could even do it a way that is transparent to the actual readout mechanism
17:10
vup
so you could either read it out via jtag or axi for example
17:11
vup
well, furthermore, with some optimizations around the register handling, the lut usage for one example was cut in half, which means the registers now probably take about 1/3rd as much luts as before
17:11
vup
finally this is all working towards making the usb3 streaming work
17:11
Bertl
what was the optimization?
17:13
vup
instead of of having on axi slave per register is now has just one axi slave accesses the correct register depending on the address
17:13
Bertl
I see, basically like the register file we use on the Beta
17:13
vup
yes I think so
17:14
vup
what we have is a bit more flexible I think
17:14
vup
for example your registers can stall arbitrarily long
17:14
vup
s/your/our/
17:15
vup
or rather they are not really just registers, but you specify custom logic that control what happens on reads and on writes
17:15
Bertl
makes sense
17:15
vup
so with the usb3 streaming we currently observe that sometimes wrong data is sent, kinda looking like some clock domain crossing issues, or maybe the data being sampled at the wrong point, which is what we are now investigating
17:16
se6ast1an
very good
17:17
vup
I think thats it, the nmigen-gateware stuff has been "stress testing" the github integrated bitstream generation and that has been working very well so far and heating my room as a bonus :)
17:18
se6ast1an
wonderful :P
17:19
se6ast1an
quick updates from me
17:19
se6ast1an
it looks like we found a contact and gigabit oscilloscope at the technical university vienna tat we can use there to test new boards/signals
17:20
se6ast1an
the contact was made through the metalab hackerspace mailing list
17:21
se6ast1an
more progress with pcb manufacturer inquiries show that any non fr4 material choice will likely be too expensive for us
17:21
se6ast1an
maybe Bertl wants to elaborate more here
17:21
Bertl
no, I don't :)
17:21
se6ast1an
current plan is to order a small number of mixed panels from oshpark and jlcpcb
17:21
se6ast1an
maybe 6-9 from oshpakr and 5 from jlc
17:22
se6ast1an
if we are lucky everything should turn out to work just fine in fr4
17:22
se6ast1an
no news from the tele smt assembly front, still waiting for their offer but I will remind them soon
17:23
se6ast1an
I will shift my focus towards the axiom remote again soon
17:23
se6ast1an
but of course the manufacturing of the hardware remains #1 priority
17:23
se6ast1an
just currently there isnt much I can contribute to this
17:24
se6ast1an
thats it from my side
17:25
se6ast1an
BAndiT1983|away: currently away it seems
17:25
se6ast1an
Bertl: the finishing blow like always?
17:25
Bertl
sure
17:26
Bertl
well, I made another attempt at setting up the backup on the hub machine, but it keeps losing network connectivity so no luck there
17:26
Bertl
sebastian started re-installing the machine, last week, so we will see how that turns out
17:27
Bertl
I also received the Plato Beta today (still in quarantine) so I will check and service it and probably do some testing and an upgrade there
17:28
Bertl
I basically finished the new power board assembly (only top side connectors are missing, and they are not required for the first tests)
17:29
Bertl
so I should be able to do the power management bringup in the next few days if all goes well
17:29
se6ast1an
most excellent!
17:29
Bertl
there is also a lot of preparations to do for getting the designs ready for the panels
17:30
Bertl
double checking parts and values, etc, which will be done over the next weeks
17:30
Bertl
that's it from my side.
17:31
se6ast1an
remembered another small note: the 1mm rubber sheet has been shipped and I informed manfred, he will pick it up soon I hope
17:31
se6ast1an
but would also cut a piece for you Bertl to test in the laser cutter whenever a meeting/delivery makes sense
17:31
se6ast1an
otherwise a postal package
17:31
se6ast1an
panintended: please go ahead!
17:32
panintended
Hi everyone. I wrote some tests yesterday for the observer pattern (in the remote's firmware), which is used for setting/subscribing to camera attribute values.
17:32
panintended
Which actually was a good move, as I found some issues - both in my design and coding errors I'd done. I'll give an MR to BAndiT1983 sometime this week with the changes.
17:32
panintended
That's all.
17:32
se6ast1an
great, many thanks!
17:33
se6ast1an
anyone else with questions, issues or things to report?
17:33
se6ast1an
ah just remembered
17:33
se6ast1an
I will particiapte in a project presentation tomorrow
17:33
se6ast1an
https://www.meetup.com/de-DE/Cloud-Native-Computing-Vienna/events/273649046/
17:34
se6ast1an
entirely online
17:34
se6ast1an
focus on: remote collaboration
17:36
se6ast1an
alright then, thanks everyone! meeting concluded!
17:36
Bertl
tx
17:38
Bertl
off again ... bbl
17:38
Bertl
changed nick to: Bertl_oO
17:49
anuejn
vup: thanks for reporting for me :)
18:18
Konstantin29
joined the channel
18:25
se6ast1an
very exciting what you are doing anuejn!
19:06
se6ast1an
hi Konstantin29!
19:06
se6ast1an
just got your email
19:08
Konstantin29
hi se6ast1an
19:09
se6ast1an
we can chat now if you want
19:09
Konstantin29
ok
19:09
Konstantin29
in english?
19:10
se6ast1an
preferably
19:10
Konstantin29
alright. no problem. just asking.
19:11
se6ast1an
http://irc.apertus.org/ archives any irc activity
19:11
se6ast1an
so others can read up on what happened
19:11
se6ast1an
like the meeting
19:12
Konstantin29
got it.
19:14
Konstantin29
So as I mentioned in the mails I am interested in getting hands on the AXIOM Beta to give you feedback from a camera man's position. I am sure you are already in contact with some others. But I thought, give it a try. Maybe they still need help.
19:16
se6ast1an
as mentioned in the emails currently help with development would be most crucial, is that something you can/want to do?
19:19
Konstantin29
What kind of help is on your mind asking from a non-coder position?
19:20
se6ast1an
while there are tons of tasks (website content, wiki documentation, graphics design, etc.) not many of them are evolving directly around the hardware I am afraid
19:21
se6ast1an
as the camera is not really ready for end users from the user experience side
19:22
se6ast1an
have you had a look at the user manual on the wiki yet? https://wiki.apertus.org/index.php/AXIOM_Beta/Manual
19:23
Konstantin29
yes I have been reading some parts of it.
19:23
se6ast1an
great
19:23
se6ast1an
sorry have to leave now, can we continue this chat maybe tomorrow?
19:23
Konstantin29
ok
19:24
Konstantin29
And I think on the graphics design side I could be a help.
19:25
Konstantin29
Bye
19:25
Konstantin29
left the channel
19:33
EmilJ
trying to figure out where the heck my hsync went
19:33
EmilJ
https://irc.tywoniak.eu/file/1/QMuA0cCs8sRa0l4r
19:35
EmilJ
I had yosys emit me some SVG from the nmigen emitted verilog, for which I had to include the verilog module descriptions for all the xilinx blocks, so it ended up emitting 70 .svg files at 15MB added up, which is a LOT Of spaghetti
20:19
BAndiT1983|away
changed nick to: BAndiT1983
20:45
aleb
left the channel
20:45
TD-Linux
left the channel
20:45
TD-Linux
joined the channel
20:52
aleb
joined the channel
22:17
BAndiT1983
changed nick to: BAndiT1983|away
23:30
mumptai
left the channel
23:57
aombk
joined the channel