#apertus IRC Channel Logs

morning Bertl

spent most of yesterday either working on my moco rig project or practicing sketching

hi se6astian :)

now I need to redo most of it :)

haha

but some parts

how so?

1. C2-C11 need to go next to the sensor pins they are closest to in the schematic. You'll need to populate them in the space you show as reserved for sensor cooling. They can go on the top or backside of the PCB. In all cases it's best to place them on the top layer since you want a direct connection to the sensor pin to avoid via inductance.

3. You'll need to clean up the LVDS traces starting from around R3/R4 and going up to the FMC connector. The right angle connection you have isn't going to work well. You want to space these trace pairs apart and provide ground fill between the LVDS pairs.

5. LVDS pairs still need to be spaced properly.

7. I see a could sensor pins that you use one via to attach to two sensor pins. These need to be separate vias to reduce inductance and lower resistance to the power plane.

I figured out I can also place the SMT 0402 capacitors under the Andon socket on the top side

careful, if we want to cool the sensor somehow, you don't want any capacitors there

Good thing you had Stuart look at it and not me because I haven't done enough PCB stuff to have an intuition about where inductance issues will happen

hmm, I would think you'd want the sensor to be evenly cooled

I still haven't seen the socket (i.e. we have too little information there) to consider cooling

so it would require some kind of elastic heat conducting material

I would cut a hole into the PCB behind the sensor and attach a metal to the sensor from behind with heat conducting paste

I'll comment on that when I have more information :)

cant a heat conducting paste close the gap without any mechanical stress?

maybe a number of holes and a slow turning fan might be a good choice, maybe heat transfer via PCB is the perfect solution ... as I said, not enough data atm :)

maybe better postbone it, and if the layout allows for some holes to measure and/or cool, it's nice but if not, so what

ok

either that or a 3D model or a proper drawing which has all data

when we get a sample or the first sockets, maybe you can put them on a high-res scanner for a start

LVDS pairs should be as close together to each other as possible right?

so when stuart says: "manually adjust the spacing on the LVDS pairs as per the schematic note"

then you want to keep that :)

for 100 ohm (not sure that is the design though)

the LVDS traces he created are all 10 mil wide though

perfect

he also suggested putting gnd traces between the pairs

or is that distance not relevant since its just a shielding?

(the ground)

like ||GND||GND||GND||

good question, how do I find out? ;)

its a 4 layer board: top/gnd/power/bottom

http://www.ewh.ieee.org/r5/denver/rockymountainemc/archive/2000/diffimp.pdf

so basically you are doing microstrip, i.e. below the signals is a ground/power layer and the signals themselves are on the outside of the board

http://en.wikipedia.org/wiki/Stripline

ah I just noticed that expresspcb can do a filled GND plane automatically after all traces are done

so how are things going on your end?

http://vserver.13thfloor.at/Stuff/AXIOM/blink*.vhd

interesting

show stopper for open source project like us

*higher model Zynq

but I'm not sure what the WebPack does or does not cover

webpack covers the "lowest 3 zynq models", they are not very specifc at what they mean with that

probably not, that was my initial comment on the ML

4 GTX with 6.6 (lower 2 package types) or 12 Gb/s (higher package type)

(just verified with xflow)

or all of them?

it definitely supports the fbg676

let me check that one

good!

well, the xc7z020 is already 200 USD there

GTX would probably be required for high speed SDI or similar

2x SDI, 2x SATA ?

if we make the separationg between recorder and camera block yes

usually the SDI stuff seems to use some kind of chaining

so, not sure why we would want to output SDI _and_ record to SATA at full speed for example

yes and no

also the display doesnt need to get a 4K signal (FullHD is good enough), which the full featured recorder should get

so no need to go high bandwidth/raw there

i.e. what the zynq can actually do

We should hang out. :)

nah, I was more citing kung-fu-panda than actually suggesting to 'hang out'

ah ok :)

http://picpaste.com/around-we0hv8J8.jpg

or better to keep them together and route booth around the via?

sec, I just managed to get PS-PL interconnect to work properly

where does that come from btw? nothing can be connected there

thanks, will do that

\o/

or maybe I'm not looking in the right places, for example I'm still searching for a register description for slcr.LVL_SHFTR_EN

(if somebody is interested :)

blink_plps{.prj,.vhd,_init.tcl} and ps7_stub.vhd

any comments on the vhdl or process in general are welcome ...

I am working on the PCB all day already

I'm going to attach a simple sensor via Bertl-Hack-PMOD for this purpose :)