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#apertus IRC Channel Logs

2014/05/26

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07:53
se6astian
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07:55
se6astian
good morning
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08:06
Bertl
morning folks!
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19:04
Marco74
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19:05
Marco74
Bertl: Hi
19:05
Marco74
Read the article on heise about your project
19:05
Marco74
I'd like to participate
19:06
se6astian
hi Marco74, thats great
19:06
se6astian
can you tell us a bit about your background?
19:07
Marco74
Actually English would not be the problem but I could also write German
19:07
Marco74
I'm Tyrolean
19:07
Marco74
Do you mind?
19:07
Marco74
... about the German?
19:08
se6astian
haha, griaß di :D
19:08
Marco74
seavas :)
19:09
Marco74
Naja, ein bisschen etwas über mich:
19:09
Marco74
* HTL
19:09
Marco74
(Elektrotechnik/IT) in Innsbruck
19:09
Marco74
Linux versteht sich bei so einem Projekt eh von selber
19:10
Marco74
war bis vor Kurzem auch Sysadmin in eine 40 Mann Firma, 3 sites, 2 Standorte
19:10
Marco74
Mit servern kann ich ein bisschen etwas anstellen
19:10
Marco74
Programmieren:
19:10
Marco74
Hab' immer C++ gemacht
19:11
Marco74
embedded aber nicht
19:11
Marco74
würde ich mir aber gern ansehen
19:11
Marco74
Wo habt ihr euer Labor?
19:12
Marco74
Bzw. Werkstatt?
19:13
se6astian
sehr gut
19:13
se6astian
hmm ja arbeitsplatz, in wien und umgebung sozusagen :)
19:13
Marco74
Ich kann auch einmal vorbeikommen
19:14
Marco74
ÖBB zahl' ich pauschal im Monat, herumfahren is eh spaßig
19:15
Marco74
Python hab' ich mir mehr oder weniger selber beigebracht
19:15
Marco74
Auch des Webzeugs (HTML, Javascript, CSS)
19:23
se6astian
wenn du dir die weltreise antun willst gerne :)
19:23
se6astian
herbert sollte bald wieder da sein dann kann er dir konkrete startpunkte geben
19:23
Marco74
Innsbruck – Wien sind 4:08 min
19:29
se6astian
ah da hat sich viel getan mit dem railjet, in meinem kopf sind noch 6 stunden drin :)
19:32
Marco74
und da ist noch viel potential drin: Deutsches Eck bzw. Wallersee
19:41
ChanServ
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19:48
intracube
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19:49
Bertl
hey Marco74, what area seems most interesting to you (regarding AXIOM Alpha or Beta)?
20:20
Marco74
Bertl: Sorry, just saw your message.
20:21
Marco74
Actually developing would be interesting
20:21
Marco74
C++ is my department as well as web
20:22
Marco74
I never did anything like embedded, but that would be very interesting
20:24
Bertl
so till now, mostly web design I presume, what did you do with C++?
20:27
Marco74
In school we had to write a software hiding information in a bitmap image
20:28
Marco74
the next project had been a image manipulating software:
20:28
Marco74
Median Blur, Sobel, etc.
20:29
Bertl
okay, how did you hide the information?
20:30
Bertl
just trying to get an idea what task might be interesting, challenging but still doable for now
20:30
Marco74
aktually in a 24 bit bitmap there 16.7 mio colors
20:30
Marco74
humans only can realize a few
20:31
Marco74
if the last bit of each channel is changed nobody would realize it
20:31
Marco74
3 channels per pixel
20:31
Marco74
so 3 bits per pixel
20:31
Marco74
This is only possible with bmp
20:32
Marco74
in short: working on elemantary bits and bytes
20:35
Bertl
I see, well, maybe you would like to play around with image processing then?
20:36
Marco74
image processing would be very great, although I needed to do much research on that
20:36
Marco74
but actually bits and bytes are my world
20:37
Marco74
that is often needed often in image processing
20:40
Bertl
well, maybe the following could be interesting to you:
20:40
Bertl
as you probably know, the AXIOM Alpha has a somewhat tricky image pipeline (actually two, one for the sensor, the other for the HDMI out)
20:41
Marco74
ok, and image processing should happen inline as I asume
20:42
Marco74
as a port of this pipeline
20:42
Bertl
the first pipeline receives the sensor data and converts it to a 'proper' memory representation, doing some preprocessing like column/row noise correction and linearization, etc
20:43
Bertl
the second pipeline fetches the memory and applies first a matrix, and then a lookup table, and passes the resulting data to the HDMI encoder
20:43
Bertl
now, I think it would be beneficial, if we could replicate the effects of those pipelines (they are VHDL code working inside the FPGA in realtime)
20:44
Bertl
with C, Python or C++, so that folks without an actual AXIOM (and the FPGA) can apply it to test images
20:45
Bertl
so basically one starts with a perfect 4k+ still image, then the code rasterizes it to simulate what the sensor will 'see'
20:46
Bertl
the result is then processed like the input pipeline would do, and you get a raw 'snap' as we capture them on the camera
20:47
Bertl
the second part would then be to process this raw data in the same way the output pipeline does it in the FPGA, so you end up with a full HD frame which is basically what you would see on a monitor
20:48
Bertl
a lot of bits and bytes, and you probably need to dig into VHDL as well (at least a little)
20:48
Marco74
sounds really interesting
20:49
Marco74
Image processing VHDL, etc.
20:50
Marco74
bun actually I wasn't involved into the project,
20:50
Marco74
so I first need to understand the whole task and the relevant environment
20:51
Bertl
of course
20:52
Marco74
so the first pipeline already exists?
20:52
Bertl
both pipelines exist and work in the AXIOM Alpha FPGA
20:53
Marco74
ah, so you want a port to C
20:53
Marco74
or C++
20:53
Bertl
or whatever (although C would be preferable)
20:53
Marco74
of course
20:54
Marco74
close to hardware
20:54
Bertl
note that part of the processing is how the hardware works
20:54
Marco74
definitely
20:54
Bertl
so for example, the rasterization the sensor does isn't implemented anywhere (yet) it just happens
20:54
Marco74
it part of the electronics
20:55
Marco74
I asume
20:55
Bertl
yup
20:55
Marco74
a 2d photo-sensor-array
20:55
Bertl
so basically you would develop an AXIOM Alpha simulator :)
20:55
Marco74
that testing is easier
20:56
Bertl
yes, especially that algorithms which are not that simple to implement in VHDL can be tested
20:57
Marco74
so for now we have that vhdl, further improvements would be done in C, therefore the port is needed?
20:58
Bertl
mostly testing, so that folks without an Alpha or Beta can investigate how to add stuff to the image pipeline
20:59
Marco74
so I really need to care about cpu-capacity and throughput time?
20:59
Marco74
because it should process images in RT
20:59
Bertl
it won't hurt, but it isn't your main concern I guess
20:59
Bertl
folks will process single images for testing I guess
21:00
Marco74
ah, ok
21:00
Bertl
but if it is efficient, maybe they will process entire movies lateron
21:00
Bertl
but I'd say that isn't the top priority
21:00
Marco74
ok,
21:01
Marco74
actually understanding VHDL could be quite difficult
21:01
Marco74
but I already figured out how ancient greek works
21:01
Marco74
this probably helps at this task
21:02
Bertl
well, VHDL isn't that complicated to read actually, you'll see
21:03
Bertl
it is harder to get it right when you're designing new modules
21:04
Bertl
you need to get an idea what logic and logic vectors are, but for the most part it is sufficient to ask (e.g. me) what the relevant part/module does and then simulate it properly
21:05
Bertl
so of course, it won't hurt to lear a little VHDL and FPGA design as well
21:07
Marco74
I think it's doable
21:07
Marco74
I love learning new stuff
21:07
Bertl
me too :)
21:08
Marco74
Just didn't have a project to learn VHDL for
21:08
Marco74
until now
21:09
Bertl
if you really want to dig into VHDL, I suggest to get a really cheap FPGA development board (there are some with lower end FPGAs for 30-60 EUR)
21:10
Marco74
actually the second problem is, that it is electronics.
21:10
Bertl
or, alternatively, if you don't want to 'mess' with electronics, you can grab GHDL and play with that
21:10
Marco74
good idea, FOSS?
21:10
Bertl
i.e. VHDL doesn't require an FPGA per se
21:10
Bertl
yes, ghdl is gnuHDL
21:11
Marco74
ah....
21:22
Marco74
so the repo is https://github.com/apertus-open-source-cinema/alpha-software.git
21:22
Marco74
?
21:23
Bertl
yep
21:23
Bertl
the cmv_hdmi2 is the current design
21:24
Marco74
this includes both pipelines?
21:25
Bertl
yes, there is a schematic overview of the pipelines, sec
21:25
Bertl
https://wiki.apertus.org/index.php?title=Axiom_Alpha_Software#Image_Pipeline
21:27
Marco74
thx.
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