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#apertus IRC Channel Logs

2021/03/26

Timezone: UTC

1
01:41
Topic
apertus° - open source cinema | www.apertus.org | join the apertus° Lab: http://lab.apertus.org/ | IRC Logs available at: http://irc.apertus.org | Weekly IRC meeting: Monday 18:00 CET/CEST
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01:41
se6ast1an
has set the topic
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02:56
vnksnkr
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03:07
lexano
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03:20
lexano
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05:18
vnksnkr
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05:33
vnksnkr
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05:44
Bertl_oO
off to bed now ... have a good one everyone!
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05:44
Bertl_oO
changed nick to: Bertl_zZ
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06:27
BAndiT1983|away
changed nick to: BAndiT1983
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06:37
mumptai
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07:50
se6ast1an
good day
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07:53
BAndiT1983
hi
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07:54
se6ast1an
how are things going?
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07:55
cnu
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07:55
satacker[m]
hi , hope everyone is doing good
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07:55
satacker[m]
I am a bit busy with college vivas
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07:55
satacker[m]
Will get back on Task 2 and coding style soon
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07:56
cnu
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07:59
se6ast1an
very good
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fredy__
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08:11
fredy__
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08:12
bluez_
changed nick to: bluez
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09:00
WalterZimmermann
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09:12
illwieckz
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10:22
illwieckz
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12:27
Bertl_zZ
changed nick to: Bertl
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12:27
Bertl
morning folks!
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12:29
BAndiT1983
hi
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12:34
markusengsner
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12:37
hp_dopeman[m]
Good morning
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14:10
vnksnkr
hi
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14:10
vnksnkr
I've tried my hand on the vhdl challenge task 2
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14:11
vnksnkr
https://github.com/vnksnkr/UART-SPI-BRIDGE-VHDL
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14:22
Bertl
you want to format and indent your code properly, currently it's more a rollercoaster ride ;)
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14:25
Bertl
if rising_edge(SCK) then
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14:25
Bertl
if (SSEL = '0') then
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14:25
Bertl
if(r_bitcnt < 7) then
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14:27
vnksnkr
oops :
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14:28
syung
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14:31
Bertl
note that these three lines contain not only indentation issues, but also white space and unnecessary parentheses
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14:31
Bertl
*missing white space
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syung
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syung
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syung
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15:08
BAndiT1983
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mumptai
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15:23
BAndiT1983|away
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uberardy
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felix_
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mumptai
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20:02
vnksnkr
I've fixed the indentation issues and removed the unwanted parantheses
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fredy
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mumptai
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markusengsner
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