| 23:00 | Bertl_oO | yeah, I would reserve at least a few days for this
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| 23:01 | Bertl_oO | there will be a lot we learn from the actual implementation and it will require some discussion/brain storming what can be improved in the future
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| 23:01 | Bertl_oO | so maybe 2 or even 3 days
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| 23:30 | Elbehery__ | Aha okay, i will include this in the sched.
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| 23:31 | Bertl_oO | excellent!
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| 23:31 | Elbehery__ | Thanks so much for your time
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| 23:31 | Bertl_oO | you're welcome!
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| 00:48 | Bertl_oO | welcome xeechou!
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| 00:49 | xeechou | hello
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| 00:49 | xeechou | I just compiled openCine on Arch
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| 00:49 | xeechou | But I don't know how to use it...
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| 00:50 | xeechou | there seems to be many buttons didn't get implemented
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| 00:50 | Bertl_oO | best check with BAndiT1983|away when he comes back
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| 00:50 | xeechou | okay, thanks
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| 00:50 | Bertl_oO | np
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| 05:04 | Bertl_oO | off to bed now ... have a good one everyone!
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| 06:27 | anuditverma | Good morning
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| 06:29 | anuditverma | Please review and comment on my first draft of the proposal so that I can improve it more https://docs.google.com/document/d/1kGqTBqHNRu6QBCnJ3S3Zgqod8BQ911QnNTKBaGmsdFg/edit
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| 08:34 | onenot8 | hey
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| 10:06 | RexOrCine[m] | Morning folks.
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| 10:07 | BAndiT1983 | hi
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| 10:20 | Bertl | morning folks!
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| 10:20 | BAndiT1983 | hi
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| 10:22 | usmankhan | Hello
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| 10:23 | usmankhan | I have completed an initial draft proposal: https://github.com/usmanwardag/gsoc17_proposal/blob/master/pid.pdf. I would appreciate any feedback or comments on this
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| 10:24 | usmankhan | Please note that I am still working on the appendix section. The rest of it is mostly complete
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| 10:24 | Bertl | will check it out shortly.
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| 10:24 | usmankhan | Thanks
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| 10:31 | RexOrCine[m] | It's well laid out.
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| 10:33 | usmankhan | Thanks, I had to change the file name, so proposal can now be found here: https://github.com/usmanwardag/gsoc17_proposal/blob/master/proposal.pdf
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| 10:45 | Bertl | anuditverma: looks good so far
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| 10:47 | Bertl | usmankhan: nice to see that you're using TeX for the document
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| 10:54 | Bertl | nitpick: in the introduction, you mention a single FET for the regulator, but in your schematic, you have the 'typical' two FETs for a synchronous buck where the diode is replaced by the second MOSFET
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| 10:55 | Bertl | s/output voltage of the sensor/output voltage for the sensor/
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| 10:56 | usmankhan | yes, correct
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| 10:58 | Bertl | as I suggested last time, you probably should extend the feedback block (in Fig 1) to include Vf and the OpAmp in+
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| 10:59 | Bertl | the reason for this is that strictly speaking you do not want to change Vf in the feedback block but you need to change in+ to create e.g. hysteresis
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| 10:59 | usmankhan | Yes, actually my plan is to create a detailed schematic (with calculations) in the Appendix. Once that is done, I will modify the main schematic as well
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| 11:00 | Bertl | okay
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| 11:03 | Bertl | 5.6 s/youll/you'll/
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| 11:05 | Bertl | btw, for a final syntactic and sematic check, it's probably best to talk with RexO or some other native English speaker ... I'm sure they will gladly check the document if you ask nicely
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| 11:06 | usmankhan | Ah, TeX ommitted that, I will correct it
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| 11:06 | usmankhan | Sure
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| 11:07 | Bertl | otherwise it looks good to me.
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| 11:09 | Bertl | personally I would add a paragraph about MOSFET selection to the Appendix, because that will also be critical for the switcher
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| 11:09 | usmankhan | Okay
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| 11:12 | Bertl | also check out what other GSoC applicants suggested (mostly here on IRC), maybe one or the other thing might be worth adding to your considerations
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| 11:13 | Bertl | like for example ADC vs comparator (we still have no clue if the ADC would be worth the trouble, space and I/Os)
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| 11:13 | Bertl | or the idea to use something different than a typical PID controller
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| 11:17 | usmankhan | Alright, I will look through the logs
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| 11:21 | Bertl | one more point which just came to my mind:
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| 11:22 | Bertl | we will have 8+ switchers on the power board (most likely implemented in a single FPGA) for the 8+ power rails
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| 11:22 | Bertl | so they need to be synchronized in such way, that they do not all draw power from the source at the same time
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| 11:23 | Bertl | otherwise there will be oscillation on the input rail
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| 11:24 | usmankhan | Right, I will discuss this in the proposal
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| 11:27 | Bertl | btw, Intersil has a number of nice documents regarding buck topologies and how to improve for certain conditions
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| 11:28 | Bertl | (Onsemi and Texas Instruments as well)
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| 11:29 | usmankhan | Yes, I followed one by Texas Instruments. I will see if I can find other resources
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| 11:51 | BAndiT1983 | Bertl, are maximum pf 2 parameters sufficient to set the registers of CMV? i know that gain required gain (of course) and ADC range, or can they be set separately?
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| 11:52 | BAndiT1983 | if separetely is possible, then i could just provide 1 parameter, so it's simpler to process
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| 11:52 | Bertl | don't think that would be enough, the image regions are for example a lot more complex than that
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| 11:53 | Bertl | and binning/subsampling changes quite a number of registers too
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| 11:53 | BAndiT1983 | i've planned also to provide possibility to set parameter as payload with length, in short byte array
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| 11:54 | BAndiT1983 | most things will be enclosed in helper methods, it's just about boiling it down to required params
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| 11:54 | Bertl | in general it might be worth to keep a register shadow and update the registers with some kind of commit
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| 11:54 | BAndiT1983 | ah, alright, so there should be a method like Commit() and Execute()
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| 11:55 | Bertl | i.e. let the user 'modify' registers in a buffer with separate commands (keep them simple)
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| 11:55 | Bertl | and then, update all the registers which have changed in one go, preferably synchronized to the image acquisition
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| 11:57 | Bertl | I thought about implementing this in the FPGA, which might be overkill but might also be a good idea to ensure that those changes happen at the right time
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| 11:58 | BAndiT1983 | at the moment i write (at least theoretically, as it results in SEGFAULT on normal PC) to the mapped memory, do we need a separate one so FPGA transfers it at right time?
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| 11:59 | Bertl | the memory mapped cmv registers are a direct interface to the SPI bus
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| 11:59 | BAndiT1983 | so the question is if we just use separate one, so you can trigger it at right time from logic
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| 11:59 | Bertl | so whatever you read will come directly from the sensor and what you write will be written immediately
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| 12:00 | Bertl | we might add a buffer/shadow in the FPGA at some point, which then would use some kind of 'special' register or register range to 'update' the registers
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| 12:01 | Bertl | haven't had time to think this through, but you can create a lab task for it so that I remember :)
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| 12:01 | BAndiT1983 | alright will do :)
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| 12:01 | BAndiT1983 | just want to set a plan beforehand, as gsoc is approaching
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| 12:02 | BAndiT1983 | so the guys who do API task do not have a stall
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| 12:05 | BAndiT1983 | task added, feel free to correct it, if it's not clear enough or wrong
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| 12:05 | BAndiT1983 | https://lab.apertus.org/T767
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| 12:05 | Bertl | tx
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| 12:05 | BAndiT1983 | i will proceed with client-server communication as it's essential, afterwards we can still adjust all the things till it's right
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| 12:05 | BAndiT1983 | no problem, lab maintenance is important
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| 12:06 | Bertl | agreed
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| 12:06 | BAndiT1983 | i hope our lab will be updated at some point to the newest version
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| 12:07 | BAndiT1983 | you have to aggree, the newer one looks really sleek
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| 12:07 | BAndiT1983 | https://secure.phabricator.com
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| 12:07 | Bertl | I'm certain it will
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| 12:07 | Bertl | doesn't look very different to me
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| 12:08 | BAndiT1983 | you have to look deeper, many improvements
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| 12:08 | BAndiT1983 | don't know if ours already has such infos -> https://secure.phabricator.com/T9893
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| 12:08 | BAndiT1983 | git branching looks helpful, tags are a must for me
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| 12:10 | BAndiT1983 | possibly that they just renamed/added the project assigning to tags
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| 12:17 | usmankhan | /quit
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| 12:17 | usmankhan | \quit
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| 12:42 | Bertl | off for now ... bbl
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| 12:42 | Bertl | changed nick to: Bertl_oO
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| 12:47 | RexOrCine[m] | As far as I know admin was asked to update it over a month back.
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| 12:50 | BAndiT1983 | Rex, you know that everything takes its time ;)
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| 12:57 | RexOrCine[m] | Aye, like sorting my phone out finally. You're right.
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| 13:03 | Bertl_oO | the problem is not the update itself, the problem is that our server is sooo outdated, that any update is a nightmare
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| 13:04 | Bertl_oO | (but this is worked on already)
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| 13:05 | BAndiT1983 | what do you mean by outdated? linux not updated or hardware?
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| 13:06 | Bertl_oO | Linux
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| 14:37 | RexOrCine[m] | If anyone reading is on Twitter could you give this a RT please - https://twitter.com/apertususer/status/844975692567793664
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| 20:56 | se6astian | good night
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| 20:56 | Bertl_oO | nn
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