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#apertus IRC Channel Logs

2015/02/26

Timezone: UTC


00:06
fsteinel_
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00:09
fsteinel
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00:09
fsteinel_
changed nick to: fsteinel
04:07
Bertl_zZ
changed nick to: Bertl
04:07
Bertl
morning folks!
05:09
Bertl
changed nick to: Bertl_OO
05:09
Bertl_OO
changed nick to: Bertl_oO
07:35
cbohnens|away
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07:38
Francky
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07:39
Francky
hi all
07:40
Francky
I am learning VHDL and FPGA systems and I tried to understand the apertus project
07:40
Francky
Is there some documentation about the code somewhere ?
07:43
philippej|away
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08:31
S3bastian
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08:31
S3bastian
good morning
08:32
S3bastian
Hi Francky, you can check the code itself for comments, other than that there is now FPGA code documentation that I know of
08:32
S3bastian
Bertl will be happy to answer any question about it though
08:32
S3bastian
*now -> no
08:39
Francky
Thank you
08:39
Francky
i'm reading both vhdl and sensor datasheet to understand the mecanisms
08:43
S3bastian
great
09:17
Francky
can you confirm that the files in the folder cmv_hdmi2 are the "main" project ?
09:18
Francky
the other forlders are just developping projects ?
09:21
Bertl_oO
yes, cmv_hdmi2 is the recent AXIOM Alpha source
09:41
Francky
hi Bertl, I red some of IRC logs and it seems that you are the FPGA boss :)
09:42
Bertl_oO
well, at least I'm doing most of the coding, yes :)
09:45
Francky
if I understand right, you have a linux on the ZYNQ arm that configure the sensor
09:45
Francky
whereas the FPGA part is taking LVDS signals and send them to hdmi ?
09:46
Bertl_oO
yes, correctly
09:47
Bertl_oO
https://wiki.apertus.org/index.php?title=AXIOM_Alpha_Software#Image_Pipeline
09:47
Bertl_oO
here you can see what happens in the FPGA
09:47
Francky
thank you
09:47
Bertl_oO
np
09:48
Francky
the "Memory" block is the DDR3 memory of the board ?
09:48
Bertl_oO
yep
09:49
Bertl_oO
so the images are also accessible from the ARM cores
09:49
Bertl_oO
(which is for example, what is used for snapshots)
09:50
Francky
ok
09:50
Francky
and this is why you use AXI and ADDR generator into FPGA
09:51
Bertl_oO
correct
09:51
niemand
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09:54
Francky
is there a project that implement only the "Image Acquisition Pipeline" in GIT ? It is to start with a smaller number of vhdl files
09:55
Bertl_oO
yes, basically the cmv_io(2) was that, but it is probably simpler just to pick the relevant files from the cmv_hdmi2, as they only exchange minimal information (synchronization) and the data is stored/fetched from memory anyway
09:56
Bertl_oO
so all files starting with cmv are basically the sensor interface
09:57
Bertl_oO
then there is the remapper (pixel_remap), some correction for noise (luts) and the high performance writer (to memory)
09:58
Bertl_oO
ser_to_par and par_match is used by the sensor interface for deserialization/pattern matching)
09:59
Bertl_oO
reg_spi is the SPI interface/mapper for accessing the sensor registers
10:10
Francky
I have to quit IRC to go to lunch. I will come back ! Thank you
10:26
Bertl_oO
you're welcome!
12:08
philippej
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12:13
colinelves
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colinelves
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13:54
Francky
hey i'm back
13:55
Francky
i have another question about I2C and sPI
13:55
Francky
I undestand that SPI is used to speak with sensor
13:55
Francky
but why there are 2 I2C bus ?
13:59
Bertl_oO
because we control some components via I2C
14:00
Francky
i see hdmi in the wiki
14:01
Bertl_oO
http://vserver.13thfloor.at/Stuff/AXIOM/ALPHA/cmv12k-adapter-v1.0.pdf
14:01
Francky
but for example I try to understand the cmv_io2 project, and there are 2 I2C bus whereas there is no HDSI output...
14:01
Bertl_oO
sheet 2 shows the I2C bus system on the adapter board
14:03
Francky
ok these components are used for the sensor
14:04
Bertl_oO
they are on the sensor interface board for various purposes
14:04
Bertl_oO
e.g. temperature measurement, low speed GPIO, etc
14:34
intracube
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15:07
S3bastian
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15:23
cbohnens
I'm off for the day, see you tomorrow
15:24
cbohnens
changed nick to: cbohnens|away
15:24
Bertl_oO
cya!
16:09
Francky
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17:00
aombk2
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aombk
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se6astian|away
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21:03
niemand
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21:56
se6astian
time for bed
21:56
se6astian
good night
22:11
intracube
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22:15
se6astian
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22:33
intracube
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