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#apertus IRC Channel Logs

2019/05/25

Timezone: UTC


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08:33
Bertl
morning folks!
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Bertl
off for now ... bbl
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20:30
apurvanandan[m]
Hi Bertl, are you around?
20:31
apurvanandan[m]
I researched on internet about clock recovery, dynamic phase alignment and encodings.
20:32
apurvanandan[m]
I found some relevant links ( 8 links) that I would like to share, as I missed previous meeting.
20:34
BAndiT1983
hi apurvanandan[m], to make the discussion easier, you could summarize important points and create a plan
20:35
apurvanandan[m]
I have gone through logs of the meeting, and understood almost everything execept the diagrams made there.
20:37
apurvanandan[m]
Hi BAndiT1983 can I post here all the links I am refering to?
20:38
BAndiT1983
you could, but not everybody will read every link, so a summary of important points is better, but you can also post the links for the logs
20:41
apurvanandan[m]
https://www.xilinx.com/support/documentation/white_papers/wp249.pdf
20:41
apurvanandan[m]
http://agata.pd.infn.it/GTS/carrier_old/New_ATCA_Carrier/Appnotes_And_Reference_Designs/Dynamic_Phase_Alignement_xapp700.pdf
20:42
apurvanandan[m]
https://www.date-conference.com/proceedings-archive/PAPERS/2010/DATE10/PDFFILES/IP2_04.PDF
20:42
apurvanandan[m]
https://en.wikibooks.org/wiki/Clock_and_Data_Recovery/Structures_and_types_of_CDRs/The_CDR_phase_comparator
20:42
apurvanandan[m]
http://www.ssc.pe.titech.ac.jp/publications/2006/20060526_philipus_ppt.pdf
20:42
apurvanandan[m]
https://scholar.cu.edu.eg/?q=hmostafa/files/icton.pdf
20:42
apurvanandan[m]
http://sci-hub.tw/https://doi.org/10.4028/www.scientific.net/AMM.602-605.2586
20:47
apurvanandan[m]
For summary: I tried to found some good techniques to recover clock from data without using transceiver or any dedicated cdr, so I came across these synthesisable CDR logics. Also XAPP 700 talks about dynamic phase shift , bit alignment and word alignment. Still going through all these.
20:54
apurvanandan[m]
Also I want to ask that in my proposal I said to start with the ft601q gearwork first, but the more important task is the Zynq -MachXO2 interfacing, so is it appreciable to do as mentioned in proposal?
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