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| 05:32 | Bertl | off to bed now ... have a good one everyone!
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| 06:59 | parimal | Hey BAndiT1983, did you go through my code?
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| 13:56 | Bertl | morning folks!
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| 14:01 | anuejn | morning :)
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| 14:06 | siddhantsahu | Bertl: Good Morning!
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| 17:03 | siddhantsahu | Hey BAndiT1983, regarding T1142 for OpenCine we need to write c++ modules for different white balancing algorithms but will the same modules work of AXIOM Beta as well? If not, then what we need to do?
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| 17:04 | BAndiT1983 | hi siddhantsahu
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| 17:05 | BAndiT1983 | why should this module work on the camera with limited hardware?
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| 17:17 | siddhantsahu | Since AXIOM Beta acquires RAW images, white point can be set afterwards in post(OpenCine) but it might help when we want to preview the footage in a monitor. AXIOM Beta users can manually dial in the illuminant temperature but they can also have option to choose to automatic set white point by the camera using these algorithms.
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| 17:19 | BAndiT1983 | this can be done by LUT
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| 17:19 | siddhantsahu | Yes
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| 17:50 | Alan_ | Hi , I have a doubt about the task T734 what would be the register output we will work on ?
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| 17:51 | Bertl | what is your doubt?
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| 17:51 | Alan_ | Will it be bayers pattern , first row RGRG... And second GBGB... And so on
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| 17:52 | Alan_ | Or will it be something different ?
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| 17:52 | Bertl | currently the memory layout is a little more complex but similar to bayer pattern
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| 17:53 | Bertl | i.e. you will get 64bit words consisting of four channel RG/GB of 12bit data plus 16bit overlay
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| 17:53 | Alan_ | As I saw somwhere it uses an array of RGGBRGGB....
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| 17:53 | Bertl | the RG is from the first bayer pattern line and the GB is from the second bayer pattern line
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| 17:54 | BAndiT1983 | https://www.researchgate.net/figure/Typical-Bayer-Matrix-with-3-main-colors-in-the-RGGB-configuration-In-this-paper-each_fig1_45709080
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| 17:59 | Alan_ | So , why we are working with bayer patter in task ?
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| 18:00 | BAndiT1983 | why not?
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| 18:00 | Alan_ | As it is mentioned that you will run it on beta .
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| 18:01 | BAndiT1983 | yes?
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| 18:07 | Alan_ | And we have to Optimize our algorithm and code to reduce memory access.
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| 18:07 | Alan_ | Whicj also includes selection of right variable size.
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| 18:07 | Alan_ | Which*
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| 18:08 | Alan_ | And if i will be working with bayer pattern rather than actual register output , thongs thongs will be different.
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| 18:16 | Bertl | well, memory access is done by the ARM cores
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| 18:17 | Bertl | so it is advantageous to utilize the cpu caches for this wile avoiding unnecessary hits on the DDR memory
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| 18:41 | Alan_ | So , for task should we write code using dev/mem or simple mapping raw12 file which will be having bayers pattern ?
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| 18:45 | Bertl | which task?
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| 18:46 | Bertl | for T734 you want to work with the framebuffer, for T1140 you work with the raw12 image
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| 19:28 | Alan_ | You are taking 64 bits packed sense at a timel , to achieve code ro reduce memory access ,right?
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| 19:28 | Alan_ | Whatelse is there done to reduce memory access
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| 19:28 | Alan_ | ?
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| 21:24 | Bertl_oO | Alan_: the best approach would be to read a number of 64bit words (enough to generate a short memory burst) and to process them with SIMD instructions while cached (with as little other memory access as possible)
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