00:01 | arpu | left the channel | |
00:39 | John_K | I've been using backblaze's normal backup product for 3 years and am very happy with it
| |
00:39 | John_K | client side encryption with a key I specify
| |
00:39 | John_K | I've also built one of their storage pods too, I like that they open-sourced their design
| |
02:06 | davidak | left the channel | |
02:42 | aombk | hmm, i will need 60 days to upload my data
| |
04:00 | John_K | eep, can you mail any of them a hard disk to seed the backup?
| |
04:56 | davidak | joined the channel | |
05:21 | aombk | John_K, i tried their service, i dont like the backup everything approach, i want to choose what to backup
| |
05:58 | jucar | joined the channel | |
06:23 | jucar | left the channel | |
06:33 | tezburma | joined the channel | |
06:34 | davidak | left the channel | |
06:43 | John_K | then I'd probably look at tarsnap, those are the only two i'd trust with my data
| |
07:40 | se6astian|away | changed nick to: se6astian
| |
07:41 | se6astian | good morning
| |
07:41 | Bertl_oO | morning se6astian!
| |
07:41 | Bertl_oO | changed nick to: Bertl
| |
07:54 | AXIOM-HQ | joined the channel | |
08:32 | niemand | joined the channel | |
08:32 | John_K | good morning
| |
08:33 | John_K | so when I'm ready to talk to the sensor, should I run cmv_snap3 ?
| |
08:34 | Bertl | no, you should first load the bitstream and then try cmv_init.sh
| |
08:34 | Bertl | that should return with a single register value, which is the sensor temperature
| |
08:36 | John_K | so cmv_hdmi3.bit?
| |
08:36 | Bertl | yep, send it to /dev/xdevcfg
| |
08:37 | John_K | ok, I'm just trying to check that the voltage pins of the socket on the sensor board have the appropriate voltages first
| |
08:37 | Bertl | yes, please do so :)
| |
08:38 | Bertl | also, you can use the pincheck to verify most of the sensor data lines as well
| |
08:38 | Bertl | i.e. activate the check_pin20.bit in the FPGA
| |
08:38 | John_K | so buzz out everything?
| |
08:39 | Bertl | then run ./check_pin20
| |
08:39 | John_K | with or without a CMV?
| |
08:39 | Bertl | it will show you all shorts/connections between lines
| |
08:39 | John_K | without I'm guessing
| |
08:39 | Bertl | without the sensor, but with the socket
| |
08:39 | Bertl | i.e. SFE but no sensor
| |
08:40 | John_K | pull-up JX1_LVDS_2_P
| |
08:40 | John_K | pull-up JX2_SE_0
| |
08:40 | John_K | pull-up JX2_SE_1
| |
08:40 | John_K | connect JX1_LVDS_22_N <-> JX1_LVDS_22_P
| |
08:40 | Bertl | that doesn't look too bad :)
| |
08:40 | Bertl | the JX1_LVDS_2_P comes from the MicroZed
| |
08:40 | John_K | are any of those problems?
| |
08:40 | Bertl | the LVDS_22 comes from the termination resistor on the clock line
| |
08:41 | Bertl | now try to bridge an LVDS pair on the socket
| |
08:41 | Bertl | and it should show up as connect
| |
08:41 | John_K | hrm, let me see what I have to do that with
| |
08:41 | Bertl | you can also pull each individual line down to GND for test, but use a 200R resistor
| |
08:42 | Bertl | there is another way you can test the connections if you prefer to use a scope/analyzer
| |
08:43 | Bertl | in this case you use the tag_pin20.bit bitstream
| |
08:43 | John_K | which row is unused in the socket again? the bottom one that's short two pins?
| |
08:43 | Bertl | and then each IO will broadcast its ID as serial bitstream :)
| |
08:46 | John_K | oh neat
| |
08:47 | Bertl | the sensor is placed in the upper left corner of the zif socket
| |
08:49 | John_K | hrm, I'm trying to short them in the socket with a 30GA wire, but am seeing nothing new on check_pin20
| |
08:49 | John_K | N05_P/N
| |
08:49 | John_K | pings 7 and 8 from left on top row
| |
08:49 | John_K | pins*
| |
08:49 | Bertl | try a different one or try a single one to GND (via 200R)
| |
08:50 | Bertl | while the pair test is nice, it has twice the chance to fail if a connection is bad
| |
08:50 | John_K | don't have an easy way to do it to GND via a resistor
| |
08:50 | Bertl | also note that the pins on the ZIF are not easy to probe
| |
08:50 | Bertl | i.e. you want to put two tiny cables in the socket and then lock it
| |
08:51 | Bertl | a simpler way for testing is to use a uPGA socket or socket strip
| |
08:51 | Bertl | and put that into the ZIF socket
| |
08:53 | John_K | ok got it to work
| |
08:53 | John_K | N_01_P/N aka JX1_LVDS_13_N/P
| |
08:55 | John_K | hrm, I think the top left pin should be GND but I'm reading 3v0
| |
09:00 | Bertl | http://vserver.13thfloor.at/Stuff/AXIOM/BETA/Sensor_Check.pdf
| |
09:02 | John_K | so H1 (GND) should be the top-left most hole in the socket right?
| |
09:03 | Bertl | yes, that's what the diagram shows (blue is GND)
| |
09:03 | John_K | ok. I measure 3v0 there
| |
09:04 | Bertl | well, that's not really good :/
| |
09:04 | John_K | maybe one of my board orientations is wrong?
| |
09:04 | Bertl | maybe, but they are all labeled/marked
| |
09:05 | John_K | they aren't on my rev :\
| |
09:05 | Bertl | really? strange
| |
09:05 | Bertl | okay, so the main board only attaches one way
| |
09:05 | Bertl | i.e. that is keyed, same goes for the power board
| |
09:05 | John_K | do all of the board version blocks orient the same way?
| |
09:06 | Bertl | so we can assume, you have those right
| |
09:06 | John_K | I'm worried about dummy interface and sensor
| |
09:06 | Bertl | the dummy interface has arrows on it which point upwards
| |
09:06 | Bertl | and yes, the labels/text on all boards are the same orientation
| |
09:07 | John_K | hrm
| |
09:07 | John_K | and the sensor board lock bar is at the "top" as well?
| |
09:07 | Bertl | yep
| |
09:07 | John_K | puzzling
| |
09:07 | Bertl | also there shouldn't be a problem, as both the sensor and dummy interfaces are rotation symmectric
| |
09:08 | John_K | they are?
| |
09:08 | Bertl | so while you won't get the correct connections, it shouldn't put GND on a power rail
| |
09:08 | John_K | ah
| |
09:08 | Bertl | the design is such, that the sensor can be rotated 180 degree without problems
| |
09:09 | Bertl | and with a full interface board, that would even work and be detectable
| |
09:09 | John_K | oh wait, it was probing as 3v0 with the lock closed
| |
09:09 | John_K | with the lock open it's 1ohm short to GND
| |
09:10 | John_K | I was probing with a tiny DMM probe that fits in the holes
| |
09:11 | Bertl | well, there is S_VS right below that one
| |
09:11 | John_K | yeah that looks to be what happened
| |
09:11 | John_K | ok so probe with the socket open
| |
09:12 | Bertl | as I said, I usually stick in a uBGA socket (strip) and lock it in place to probe
| |
09:12 | Bertl | unless I'm probing a single location
| |
09:12 | John_K | i don't have such a small size available here
| |
09:12 | John_K | luckily my DMM probes fit
| |
09:13 | Bertl | okay then, just make sure that there is no short circuit when you close the zif socket
| |
09:13 | Bertl | because if that happens with the sensor plugged in, you might grill it
| |
09:17 | John_K | well it it shorted 3v0 to GND we'd know I think
| |
09:17 | John_K | btw is 2.5v ok for VIO?
| |
09:20 | John_K | it LVDS pairs are at 2.5v, but the chip says mav 2.4v
| |
09:20 | John_K | was just curious what you're driving it at
| |
09:26 | Bertl | for the test the zynq uses CMOS25 config
| |
09:26 | Bertl | when operating in the intended way, those are configured as LVDS25
| |
09:26 | Bertl | which will have the expected swing
| |
09:26 | John_K | ok
| |
09:27 | John_K | I've verified the voltages, I guess I might give the sensor a try
| |
09:27 | Bertl | good :)
| |
09:27 | John_K | be back in 5
| |
09:50 | John_K | hrm
| |
09:51 | John_K | cmv_init.sh prints out 0
| |
09:51 | John_K | ./power_init.sh
| |
09:51 | John_K | ./power_on.sh
| |
09:51 | John_K | cat cmv_hdmi3.bit > /dev/xdevcfg
| |
09:51 | John_K | /cmv_init.sh
| |
09:51 | John_K | 0x00000000
| |
09:51 | Bertl | that means that the SPI communication with the sensor is not working properly
| |
09:52 | John_K | sensor pin 1 locator dot should point at the lower left of the socket correct?
| |
09:52 | Bertl | check the light pink pins on the top-right corner
| |
09:52 | John_K | oh wait, do I need PIC or CPLDs programmed for that?
| |
09:53 | Bertl | yep, index pin A1 is on the bottom left
| |
09:53 | Bertl | ah, yes, you need the RFE for this to work
| |
09:53 | John_K | aha
| |
09:54 | Bertl | I usually test all the functionality board by board
| |
09:55 | Bertl | so once I get to the sensor board the PIC and FPGAs are already working
| |
09:55 | John_K | well that's why I'm keeping track of this so I can throw it on the wiki
| |
09:56 | John_K | it's always fun being the 2nd person to bring up a system
| |
09:56 | John_K | so nothing in that directory is jumping out at me as RFE bitstream or a way to program it
| |
10:01 | Bertl | let's see what scripts/code you have (sec) I don't think we have the latest tools for that on the image
| |
10:02 | John_K | sure, I see some icsp and pic related stuff
| |
10:03 | Bertl | remove the SFE (just to make sure)
| |
10:03 | Bertl | (or at least the sensor)
| |
10:04 | Bertl | then activate the icsp.bit (md5: f671a9a98f7bbbc38636aab43954e979)
| |
10:04 | John_K | sensor is warm to the touch
| |
10:04 | John_K | booting back up now
| |
10:05 | Bertl | that is kind of expected, it usually gets about 10°C over room temperature when not cooled
| |
10:05 | John_K | feels about right
| |
10:06 | John_K | my icsp.bit is different
| |
10:06 | John_K | # openssl md5 icsp.bit MD5(icsp.bit)= 86005abfb43edbc4383e8450968c5d2b
| |
10:06 | Bertl | okay, do you have a script called icsp_sel?
| |
10:06 | John_K | no
| |
10:06 | John_K | i have 4 python files
| |
10:07 | John_K | icsp.py, dump, prog, off
| |
10:09 | Bertl | http://vserver.13thfloor.at/Stuff/AXIOM/BETA/icsp.bit
| |
10:09 | Bertl | http://vserver.13thfloor.at/Stuff/AXIOM/BETA/icsp_sel.py
| |
10:09 | Bertl | http://vserver.13thfloor.at/Stuff/AXIOM/BETA/icsp.py
| |
10:11 | Bertl | give me a few minutes to get the hardware you have together here
| |
10:12 | John_K | no worries, I'm glad for the help
| |
10:15 | Bertl | do you have the 3xPMOD assembled as well?
| |
10:17 | John_K | I do not
| |
10:19 | Bertl | okay, it would be helpfull to get at least the LEDs soldered on
| |
10:19 | Bertl | LEDs and resistor networks that is
| |
10:19 | niemand | left the channel | |
10:19 | Bertl | simplifies testing of the FPGA
| |
10:20 | Bertl | anyway, my setup should now be similar to yours
| |
10:21 | John_K | ok
| |
10:21 | Bertl | when you load the icsp.bit the blue led on the microzed goes on
| |
10:21 | John_K | i'll give that a shot now
| |
10:21 | Bertl | ./icsp_sel.py A
| |
10:21 | Bertl | should slect the west side FPGA
| |
10:21 | Bertl | (or at least the bus to the PIC)
| |
10:22 | Bertl | next step: i2cdetect -r -y -a 2
| |
10:23 | John_K | got he blue light
| |
10:23 | John_K | the*
| |
10:24 | John_K | I get all --'s except for 70: 70 in colum 0
| |
10:24 | Bertl | that's fine
| |
10:24 | Bertl | now run ./icsp_picid.py
| |
10:24 | John_K | I don't have that script
| |
10:25 | Bertl | okay, sec
| |
10:26 | Bertl | http://vserver.13thfloor.at/Stuff/AXIOM/BETA/icsp_picid.py
| |
10:26 | John_K | anything else I'll need? I have to shutdown and swap the sdcard to put new files on right now
| |
10:26 | Bertl | why's that?
| |
10:27 | John_K | I don't have ethernet nearby here
| |
10:27 | Bertl | no laptop nearby?
| |
10:27 | John_K | laptop yes
| |
10:27 | John_K | I could find a usb stick I guess
| |
10:27 | John_K | 1 sec
| |
10:28 | Bertl | does your laptop have an ethernet jack? is it already used?
| |
10:28 | John_K | macbook, no ethernet
| |
10:29 | Bertl | thunderbolt?
| |
10:29 | John_K | yeah
| |
10:29 | Bertl | there is an ethernet adapter for that, IIRC :)
| |
10:29 | John_K | there is, I just don't have one here
| |
10:29 | John_K | that link is broken
| |
10:30 | John_K | aha a folder
| |
10:30 | Bertl | yeah, I moved it in one place
| |
10:36 | John_K | # python icsp_picid.py
| |
10:36 | John_K | b'Z'
| |
10:36 | John_K | b'L'
| |
10:36 | John_K | b'#3DAF3DAF'
| |
10:36 | John_K | b'^'
| |
10:36 | John_K | then hangs and the dies with a ValueError
| |
10:37 | Bertl | well, that's not good
| |
10:37 | John_K | https://gist.github.com/John-K/9c1d9768d34902ebe453
| |
10:38 | John_K | i2cdetect showing nothing now
| |
10:38 | John_K | selecting it again makes it come back up
| |
10:39 | Bertl | yeah, that is kind of expected
| |
10:39 | John_K | same behavior with icsp_sel.py B
| |
10:40 | Bertl | do you have a gpio.py script?
| |
10:41 | John_K | a bunch of scripts that start with gpio_ but not gpio.py
| |
10:41 | Bertl | http://vserver.13thfloor.at/Stuff/AXIOM/BETA/ICSP/gpio.py
| |
10:46 | John_K | ok now what
| |
10:47 | Bertl | run it :)
| |
10:49 | John_K | https://gist.github.com/John-K/d8ae9a045a70cd3b32b8
| |
10:50 | Bertl | okay, that looks fine, let's update your kernel and devicetree, maybe the image still has the broken serial driver
| |
10:51 | John_K | # uname -a
| |
10:51 | John_K | Linux beta 4.0.0-xilinx-00054-g3a450582-dirty #3 SMP PREEMPT Sun Oct 25 07:08:41 UTC 2015 armv7l GNU/Linux
| |
10:51 | Bertl | http://vserver.13thfloor.at/Stuff/AXIOM/BETA/ICSP/{devicetree.{dtb,dts},zImage}
| |
10:51 | John_K | Linux version 4.0.0-xilinx-00054-g3a450582-dirty (root@beta) (gcc version 5.2.0 (GCC) ) #3 SMP PREEMPT Sun Oct 25 07:08:41 UTC 2015
| |
10:51 | John_K | ok
| |
10:52 | Bertl | simply copy it to /boot
| |
10:52 | Bertl | run sync
| |
10:52 | Bertl | and reboot the Beta
| |
10:54 | John_K | ok what to try now?
| |
10:55 | John_K | icsp again?
| |
10:56 | John_K | aha
| |
10:56 | John_K | much better
| |
10:57 | John_K | https://gist.github.com/John-K/9c1d9768d34902ebe453
| |
11:01 | John_K | similar but different result for B
| |
11:03 | John_K | looks like I need a hex file?
| |
11:09 | Bertl | better but still not perfect
| |
11:10 | Bertl | the ['0x3fff', '0x3fff'] show the vendor/device ID from the pic
| |
11:10 | Bertl | which should be ['0x2000', '0x305b']
| |
11:10 | John_K | ah
| |
11:11 | Bertl | so, for whatever reason, you PIC is not responding
| |
11:11 | John_K | ok
| |
11:11 | Bertl | power enable and power good was fine on the gpio.py reading
| |
11:12 | Bertl | the reset line should switch depending on your sel
| |
11:12 | John_K | which one where you looking at?
| |
11:12 | Bertl | i.e. either A_#RST or B_#RST
| |
11:12 | John_K | they are both 1 right now
| |
11:13 | John_K | O1+1
| |
11:13 | Bertl | they will get reset during the picid
| |
11:14 | John_K | ah
| |
11:14 | Bertl | try to specify A and B to the icsp_picid.py
| |
11:15 | John_K | values are now the same for both A & B
| |
11:16 | Bertl | and do they show the correct PIC ids?
| |
11:16 | John_K | picid A and picid B give same value no matter which was selected
| |
11:16 | John_K | no
| |
11:16 | John_K | still 3fff
| |
11:16 | Bertl | means the pic is not properly responding
| |
11:17 | Bertl | do you have a scan/image from the main board?
| |
11:18 | John_K | onse sec
| |
11:20 | John_K | https://kelley.ca/temp/Main_Board_v0.33_r1.1-Top.jpg
| |
11:20 | John_K | https://kelley.ca/temp/Main_Board_v0.33_r1.1-Bottom.jpg
| |
11:21 | John_K | trying my other main board now
| |
11:23 | John_K | still bad IDs on this one
| |
11:24 | Bertl | the only difference I can see between my board and yours is R7 (which is not populated on mine)
| |
11:24 | Bertl | but that shouldn't be a problem IMHO
| |
11:25 | John_K | R7 and R8?
| |
11:25 | Bertl | yep
| |
11:25 | Bertl | but let's check connectivity for the bus first, I would suspect that something is wrong there
| |
11:26 | Bertl | can you attach a proble to *_SCL and *_SDA ?
| |
11:26 | John_K | I have a DMM here, I can put a scope on it tomorrow
| |
11:27 | Bertl | well, DMM is tricky to see, pulses are short with the default I2C
| |
11:27 | John_K | you want me to check for PU's or something else
| |
11:27 | Bertl | but we can do a test, sec
| |
11:43 | Bertl | nah, unfortunately that is rather complicated to access
| |
11:44 | Bertl | what you could do is to write a small VHDL code for the zynq to toggle the SDA/SCL at a known low frequency (<1Hz) which you can measure with the DMM
| |
11:45 | Bertl | otherwise your best bet is a scope or logic analyzer
| |
11:46 | John_K | yeah I can hook up a logic analyzer tomorrow
| |
11:47 | John_K | I should see commands when doing picid?
| |
11:47 | John_K | sorry, I've never used PICs before, strictly ARM and MIPS
| |
11:48 | Bertl | yeah, the ICSP = In Circuit Serial Programming
| |
11:48 | Bertl | will show a number of sequences via clock and dat
| |
11:49 | John_K | if there are any other test procedures or instructions on how to program the CPLDs that I can try in 8-12 hours that would be great
| |
11:49 | John_K | is ICSP I2C based?
| |
11:49 | Bertl | no, but reasonably similar
| |
11:49 | John_K | ah ok
| |
11:49 | Bertl | well, strictly speaking you don't need the PICs
| |
11:49 | Bertl | you can hook up the JTAG port of the RFE lattice
| |
11:50 | John_K | oh
| |
11:50 | Bertl | and program it directly
| |
11:50 | Bertl | the PICs are for handling the FPGAs
| |
11:50 | John_K | ah
| |
11:50 | John_K | mostly just for programming them or other things?
| |
11:51 | Bertl | but the unprogrammed PIC should result in sane defaults for the other FPGA pins
| |
11:51 | Bertl | bascially programming and interface/control for the FPGA
| |
11:51 | John_K | ok
| |
11:51 | John_K | BTW, where can I find FW for the PICs and FPGA?
| |
11:52 | Bertl | the PIC firmware (and source) is on your beta image
| |
11:52 | John_K | ok
| |
11:52 | Bertl | in /opt/PIC/PIC16/PIC16F1718
| |
11:53 | Bertl | and can be compiled on the Beta
| |
11:53 | John_K | oh, nice
| |
11:53 | Bertl | the RFE code is here http://vserver.13thfloor.at/Stuff/AXIOM/BETA/LATTICE/
| |
11:54 | John_K | ok cool
| |
11:54 | John_K | I'll see what I can get working after I wake up
| |
11:55 | John_K | 5am here, going to grab 4 hours of sleep
| |
11:55 | Bertl | okay, have a good night then!
| |
11:55 | John_K | thanks! and thanks again for the help debugging
| |
11:57 | Bertl | you're welcome!
| |
12:06 | niemand | joined the channel | |
13:10 | jucar | joined the channel | |
13:58 | jucar | left the channel | |
14:00 | arpu | joined the channel | |
14:11 | niemand | left the channel | |
14:17 | jucar | joined the channel | |
14:29 | jucar | left the channel | |
14:35 | tezburma | left the channel | |
14:48 | tezburma | joined the channel | |
15:22 | se6astian | gotta go
| |
15:22 | se6astian | changed nick to: se6astian|away
| |
15:49 | se6astian|away | changed nick to: se6astian
| |
15:56 | arpu | left the channel | |
16:16 | jucar | joined the channel | |
18:07 | davidak | joined the channel | |
18:27 | niemand | joined the channel | |
18:46 | niemand | left the channel | |
18:58 | darthrak_ | joined the channel | |
19:03 | niemand | joined the channel | |
19:11 | darthrak_ | left the channel | |
19:35 | davidak | left the channel | |
19:42 | niemand | left the channel | |
20:04 | niemand | joined the channel | |
20:20 | Bertl | off to bed now ... have a good one everyone!
| |
20:20 | Bertl | changed nick to: Bertl_zZ
| |
20:21 | niemand | left the channel | |
20:25 | tezburma | left the channel | |
20:36 | darthrak_ | joined the channel | |
20:47 | gnufan | joined the channel | |
21:05 | darthrak_ | left the channel | |
21:07 | darthrak_ | joined the channel | |
21:08 | darthrak_ | left the channel | |
21:14 | se6astian | changed nick to: se6astian|away
| |
21:17 | jucar | left the channel | |
22:00 | intracube | left the channel | |
22:09 | techydude | joined the channel | |
22:10 | techydude | left the channel | |
22:46 | intracube | joined the channel |