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#apertus IRC Channel Logs

2020/08/24

Timezone: UTC


02:04
Bertl
off to bed now ... have a good one everyone!
02:04
Bertl
changed nick to: Bertl_zZ
05:43
BAndiT1983|away
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06:03
mumptai
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10:42
Bertl_zZ
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10:42
Bertl
morning folks!
10:52
Bertl
off for now ... bbl
10:53
Bertl
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11:06
BAndiT1983
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11:07
BAndiT1983|away
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12:46
illwieckz
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se6ast1an
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Guest27507
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Guest27507_
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15:22
metal_dent[m]
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bluez_[m]
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metal_dent[m]
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bluez_[m]
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bluez_[m]
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15:59
Bertl_oO
changed nick to: Bertl
16:00
se6ast1an_
MEETING TIME!
16:00
se6ast1an_
hello everyone!
16:01
se6ast1an_
please pm me now as usual to report
16:03
se6ast1an_
metal_dent[m]: please go ahead
16:04
metal_dent[m]
hi everyone!
16:04
metal_dent[m]
last week i was trying to read the data from the key managers (whichever is specified in the python command) but had some problems as the crc8 method on the remote side was not working in some special cases so mostly i debugged that
16:05
metal_dent[m]
also i was just discussing with BAndiT1983 and he suggested to send the acknowledgement in a packet so currently i'm working on that
16:07
metal_dent[m]
also i'm trying to clean-up the code as the evaluation is starting from tonight, adding relevant info to the readme too so other people can know how to run the script etc.
16:07
metal_dent[m]
that's it from me, thank you
16:08
se6ast1an_
many thanks!
16:08
se6ast1an_
bluez_[m]: please go ahead
16:08
bluez_[m]
tx, hi everyone!
16:08
bluez_[m]
https://github.com/Swaraj1998/axiom-beta-rfdev/commits/master
16:09
bluez_[m]
please look at the commits since after Aug 17
16:09
bluez_[m]
so a lot got done this week
16:09
bluez_[m]
all the hardcoded jtag state transitions are now done automatically through tap_advance function
16:10
bluez_[m]
we use a jtag path table for that.. which can be directly used from a python script (needs cleanup though)
16:10
bluez_[m]
s/used/produced
16:11
bluez_[m]
besides that i mostly worked on the the ioctl (or user) interface of the driver
16:12
bluez_[m]
i tested it with c code application.. tried a full bitstream upload and it works nicely!
16:12
bluez_[m]
so after a lot of improvements being done... i think the user interface is almost complete
16:13
bluez_[m]
only a simultaneous read-write functionality is left which ill add very soon
16:14
bluez_[m]
other than that the openocd side of things are left... i.e. making it work with my ioctl interface so that something like an svf replay is possible through openocd
16:15
bluez_[m]
so this will be my target for this week.. bertl has set up an fpga as well for me to test... i'll try my best to do it this week... or else complete it after gsoc ':D
16:15
bluez_[m]
will also start on the wiki and report soon
16:15
bluez_[m]
thats all from my side!
16:16
se6ast1an_
the place where in the wiki has been resolved?
16:16
se6ast1an_
many thanks!
16:16
bluez_[m]
i guess you mentioned the gsoc entry of the project?
16:17
se6ast1an_
yes
16:17
se6ast1an_
preetimenghwani[: your turn!
16:17
bluez_[m]
yeah there then... for now...
16:17
preetimenghwani[
Hi Everyone!
16:18
preetimenghwani[
This week I added a few more register defaults and gave a final patch to Bertl for integration
16:19
preetimenghwani[
I was facing some issues with original address generator so I made a new one which solves my problem
16:19
Bertl
note: it is not clear how :)
16:20
preetimenghwani[
Bertl also tested the address generator(without DSP) on full beta
16:20
preetimenghwani[
Bertl: yes
16:21
preetimenghwani[
I just started fresh, I am not able to figure out what was the problem with the original one
16:22
preetimenghwani[
Next, I have also almost completed a final patch for 2 writers as well (i.e integrated with the full pipeline)
16:23
preetimenghwani[
I have implemented the task of doubling the throughput on minima framework in 32 channels mode
16:23
preetimenghwani[
Thats it from me!
16:24
Bertl
thanks!
16:24
se6ast1an_
great, thanks
16:25
se6ast1an_
vup please go ahead
16:25
vup
Ok, not a lot of updates from me, as uni is keeping me quite busy
16:25
vup
however I finally uploaded my pic32mz without xc32 efforts here: https://github.com/apertus-open-source-cinema/pic32mz-no-xc32
16:26
vup
while cleaning that up, I also made the interrupt related code a bit more convenient, that doesn't change however that it still doesn't work :)
16:26
vup
finally I also updated fw2.x to the latest linux version (5.8.1) and to the newest u-boot version
16:27
vup
the new linux version could help for example with the usb wifi sticks, so it might be interesting to retest them.
16:27
vup
Thats it from me
16:27
Bertl
how hard is it to update e.g. the remote test systems?
16:29
vup
well the only "supported" way to update systems is still reflashing the sdcard, however rsync'ing over a new image (for "/boot" and "/") should in principle work
16:29
Bertl
okay
16:30
se6ast1an_
I returned the wifi sticks to bertl today
16:30
se6ast1an_
the 3 we had at the office
16:31
se6ast1an_
quick updates from me
16:31
se6ast1an_
beside returning bertls wifi sticks I picked up the prober hardware
16:31
se6ast1an_
and will try to push the prober control software forward in the coming weeks
16:32
se6ast1an_
I also got enclosure parts back to demo at a presentation on wednesday
16:32
se6ast1an_
the local CG meetup where 3D animators in vienna will hear about the axiom project
16:32
se6ast1an_
organized by simon repp
16:33
se6ast1an_
a conversation with manfred started since last week
16:33
se6ast1an_
about adapting the injection mold heatsink
16:34
se6ast1an_
or first testing it with springs in the screws to see if that solves the "uneven pressure" issue
16:34
se6ast1an_
parts have been ordered
16:34
Bertl
note: from the physics perspective, it won't :/
16:35
se6ast1an_
laser cut session to cut rubber feet and acrylic optical filter placeholders to test the glueing routines with Bertl is scheduled for Thursday
16:35
se6ast1an_
thats all from my side
16:35
se6ast1an_
bertl?
16:35
Bertl
thanks!
16:36
Bertl
well, I was mainly busy with helping the students with the 'final' integration of their projects
16:36
Bertl
or at least the parts which can be integrated so far
16:36
Bertl
there is still a lot of work to be done, but it doesn't look too bad :)
16:37
Bertl
I also got the Hub Beta working here and use(d) it to test the student modifications to the gateware
16:38
Bertl
for example, we incroporated changes to the register defaults and are currently working on the address generator as preetimenghwani[ already mentioned
16:39
Bertl
I recently got SPI working and used that to write a test framework which can be used for things like testing/verifying the address generator
16:40
Bertl
and this was used to compare the DSP based address generator to the DSP-less one and except for the match behaviour (which should now be fixed as well) they are doing exactly the same
16:41
Bertl
one problem with the address generator in general is that it has a speed limit of somewhere around 235 MHz so we can't achieve higher speeds on the AXI bus with the current design
16:41
Bertl
note: the proper solution here would be to redesign the way the addresses are fed into the high performance writers
16:42
Bertl
but I think we can speed up the address generator somewhat to work around this issue without changing the design right now
16:42
Bertl
this is also what I'm currently working on as this would allow increased transfer speeds from the sensor
16:43
Bertl
the rest of my available time went into remote setup maintenance and testing
16:43
Bertl
that's it from my side for this week
16:44
se6ast1an_
many thanks!
16:44
se6ast1an_
anyone else who would like to share anything?
16:44
se6ast1an_
apoorva_arora: ?
16:47
se6ast1an_
OK, then meeting concluded! many thanks all participants!
17:01
RexOrCine_OnTour
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17:09
RexOrMatrix[m]
Have students done their wrap-up accounts for respective article?
17:22
RexOrMatrix[m]
Remember the article will look like this so how entries should be formatted can be gleaned here - https://www.apertus.org/google-summer-of-code-wrap-article-august-2018
17:23
RexOrMatrix[m]
If you can forward entries to the team email address sooner rather than later that would be appreciated.
17:27
RexOrMatrix[m]
Ping "preetimenghwani" (https://matrix.to/#/@preetimenghwani:matrix.org) "bluez_" (https://matrix.to/#/@bluez_:matrix.org) "metal_dent" (https://matrix.to/#/@metal_dent:matrix.org) "apoorva_arora" (https://matrix.to/#/@freenode_apoorva_arora:matrix.org)
17:29
metal_dent[m]
yes, we will keep this in mind!
17:29
metal_dent[m]
so update the entry in wiki with the final report -> https://wiki.apertus.org/index.php/GSoC_Projects
17:29
metal_dent[m]
and also write a blog on apertus.org
17:33
RexOrCine_OnTour
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17:39
bluez_[m]
RexOrMatrix: sure! but which team email address?
17:41
metal_dent[m]
i think this one -> *email address removed*
17:43
bluez_[m]
ah, ok.. thanks!
18:41
Bertl
off for now ... bbl
18:41
Bertl
changed nick to: Bertl_oO
19:04
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20:54
illwieckz
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21:28
se6ast1an_
off to bed, good night
21:30
BAndiT1983
changed nick to: BAndiT1983|away
21:31
Bertl_oO
nn
22:03
mumptai
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Dest123
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23:01
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lexano
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