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#apertus IRC Channel Logs

2014/02/23

Timezone: UTC


01:36
troy_s
Bertl: The bayer is GRBG yes?
01:38
Bertl
RGGB unflipped and GBRG when flipped
01:38
Bertl
(flipped is the default, because it gives the expected image)
01:44
troy_s
Bertl: Is it a vertical and horizontal flip?
01:45
Bertl
no, just vertical, the horizontal flip won't work with 'only' 32 LVDS channels
01:54
danieeel
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01:57
Bertl
troy_s: still working on the debayering?
01:57
troy_s
Bertl: Well it's tedious. I don't want to merely copy paste code, so yes... I'm currently trying to understand VNG.
01:59
troy_s
Bertl: Which isn't so bad, but just slow as glue. And my brain was getting deadly tired with solving Qt nuances.
01:59
troy_s
(Hello QGraphicsView, I'm looking at you.)
01:59
Bertl
hehe
01:59
troy_s
Bertl: Not funny! It really is brain exhausting.
01:59
Bertl
that's why I usually avoid GUIs nowadays
01:59
troy_s
Bertl: Further, the code obfuscation of VNG explanations is nightmarish.
01:59
troy_s
Bertl: Well... GUIs are kind of mandatory for imaging apps. Just sayin'.
02:00
troy_s
so :P
02:00
Bertl
it might be simpler and maybe faster to write it from scratch
02:00
troy_s
Also sort of having new things pop into head as to how to negotiate the various buffers.
02:00
troy_s
Not exactly super simple... tradeoffs.
02:00
troy_s
We have the base 16 bit integer raw, that needs to become a float (OIIO does the lifting here well) and also needs to be a basic 8 bit image for dumping to display.
02:00
troy_s
(Plus a float buffer for each interpolation attempt.)
02:01
Bertl
well, 16bit int to float is 'divide by 65535 or 65536 depending on your interpretation of white
02:03
Bertl
but as we actually do 12bit, padded to 16bit
02:03
troy_s
Not quite that simple to be honest.
02:03
Bertl
it would be better to use 65520
02:03
troy_s
There's all sorts of little quantization nuances that suck.
02:03
troy_s
So I leave that up to OIIO.
02:03
troy_s
(There was a great HN article on quantization nuances last year)
02:03
Bertl
quantiziation when converting to float?
02:04
troy_s
Minor gotchas
02:04
troy_s
Yes.
02:04
troy_s
Anyways, that's not much of an isuse
02:04
troy_s
My MATLAB comprehension IS however.
02:04
troy_s
(And that's where so many imaging algos live it drives me to distraction)
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02:14
troy_s
BRAIN. HURTS.
02:15
Bertl
take a short break, do some juggling
02:15
Bertl
keeps the mind active but off the issue on hand :)
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Bertl
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11:00
se6astian
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11:00
se6astian
good morning!
11:01
Bertl
morning se6astian!
11:30
[1]se6astian
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11:47
Topic
apertus° - open source cinema | www.apertus.org | Currently Hot: Axiom Alpha Development http://axiom.apertus.org/ | IRC Logs available at: http://irc.apertus.org
11:47
se6astian
has set the topic
12:04
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12:04
Bertl
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12:18
philippej
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12:18
philippej
Hi everyone !
12:19
Bertl
hey philippej!
12:19
philippej
How goes ?
12:19
Bertl
fine, thanks! you?
12:19
philippej
Feedback from Berlin ? I already got one fro Sebastian
12:20
philippej
Fine as well, multitasking on projects right now, which most of the time is a good feeling. Our brain probably like it :-)
12:22
Bertl
the photonik kongress was quite nice, but demanding without any chance to sit for 13 hours :)
12:23
philippej
You must have enjoyed it :-)
12:25
philippej
Sebastian told me that you already implemented matrix conversion, lut and gamma !
12:26
Bertl
yes, but that was last week basically
12:26
Bertl
i.e. we have everything ready we planned for axiom alpha and a little more
12:26
philippej
Just for my curiosity, could you tell me how you implemented fpn correction, and if memory bandwidth is an issue for this step?
12:28
Bertl
sure, memory bandwidth is not an issue for FPN correction in the current setup
12:28
Bertl
we have two layers, the first one does row/column noise correction
12:29
Bertl
this is done via four lookup tables of 2048 elements each
12:29
Bertl
two for the 4096 columns and two for the 3072 rows (plus some extra)
12:29
Bertl
they currently hold 9bit signed values to offset each row/column
12:30
Bertl
for the gain dependent fixed pattern noise, we use the unused space in memory when fetching the captured image data (for hdmi output)
12:31
philippej
so if i understand well the fpn is always on a row or a column, I thought it was per individual pixel dependant
12:31
Bertl
the row/col corrections (which are the majority) aren't but the gain based corrections are per pixel
12:32
philippej
so you have enough memory left to store a whole image's list of pixels for correction, right?
12:32
Bertl
there is no reason to expect an 'offset' per pixel, as the cmos sensor design shouldn't expose such kind of noise
12:32
philippej
ok
12:32
Bertl
we have enough memory for up to 8 frames
12:33
philippej
great!
12:33
philippej
dead pixel removal can also be done?
12:33
Bertl
in theory yes, but we haven't addressed this yet
12:34
philippej
incredible progresses as always, congrats :-)
12:35
philippej
I try to keep up to date on just what is achieved without inner knowledge, it might prove useful later, with such a fast progress even this is sometimes hard to keep up to date
12:35
Bertl
thanks
12:37
philippej
lunch time, see you later
12:42
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12:47
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13:00
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13:07
danhanes
bertl: Contrats on the amazing progress & the show. Still climbing the VHDL curve here.
13:07
danhanes
a questions: can I buy a "test" sensor from CMOSIS from you ?
13:09
Bertl
you mean you would like to buy the engineering sample from us?
13:10
danhanes
I would like to get an engineering sample, I don't know if it would be better to go through you
13:10
danhanes
or to go directly to CMOSIS.
13:10
danhanes
I sense that they are a little difficult to deal with
13:11
se6astian
not at all, I would recommend to just order it from them directly
13:11
Bertl
it might still be an option for us to check out the new V2 (as engineering sample)
13:12
danhanes
I am just looking for something functional so that I can plug it in to a Zed and learn something
13:12
danhanes
image quality is not an issue
13:12
danhanes
What does a "defective" sensor cost ?
13:13
Bertl
the engineering samples are half the price IIRC
13:13
danhanes
Ah - still not cheap
13:14
Bertl
yes, I don't know what defects they usually have, the one we got we already know
13:14
Bertl
i.e. one column is 'stuck' and there are two vertical lines with dots
13:15
Bertl
http://vserver.13thfloor.at/Stuff/AXIOM/RAW/colors_400ms.png
13:16
Bertl
actually four vertical lines and some kind of bleeding (now that I look at it :)
13:17
danhanes
yes, I see. That would be fine for my purposes; I just need some HW to play with.
13:17
danhanes
Reading through VHDL puts me to sleep ( even yours, Bertl..)
13:17
Bertl
let's see what se6astian says, I'm not going to interfere there ... it might also take some time till we get a replacement
13:18
danhanes
I'm saving my pennies for a Zedboard, connectors, etc., it'll be a few months.
13:19
Bertl
I see, so you're going to build the frontend adapter yourself, I take it?
13:19
danhanes
yes, thats the plan. Better idea ?
13:20
danieel
Bertl: sensor errors should be evaluated on a non-debayered picture
13:20
Bertl
the raws are at the same location, I just took that one because it was faster to view
13:20
danieel
.raw or .xz?
13:21
Bertl
.raw16.xz is the best option for reviewing
13:26
Bertl
danhanes: we already had a number of requests for a zedboard setup, i.e. for a frontend adapter plus sensor, so we are investigating our options here
13:27
Bertl
might be that we come up with a cheap solution to get a prototype to work with .. we'll see
13:27
danhanes
great - I think it would be very helpful if you could "package" the bits needed to get up an running
13:27
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13:27
Bertl
in any case you might want to contact us shortly before ordering anything in this regard and ask for the status
13:28
danhanes
for those of us who want to get the hw up and running so that we can contribute
13:28
Bertl
there is a lot of potential contributions which do not require any part of the hardware, although I can imagine that it is more fun with the hardware :)
13:29
danhanes
Yes, plenty of SW - but it seems plenty of SW developers. The PL is more challenging
13:30
Bertl
for example a lot of VHDL code evaluation and code optimization can be done without ever touching the hardware
13:30
danhanes
yes, in theory. It is much more satisfying to see LEDs blink
13:30
Bertl
as I said, necessary: no, more fun: definitely :)
13:33
danhanes
I have found it a little difficult to stitch together all of the VHDL / Zedboard / sensor signals
13:33
danhanes
in my mind in a coherent whole.
13:34
danhanes
Being able to get a prototype running and then break it would be easier
13:34
danhanes
Hats off to your pioneering efforts.
13:35
Bertl
just to get an idea, what would you be willing to pay for a prototype setup, i.e. something you can plug in and get an image?
13:35
danhanes
Yes, of course - the real question is how much I can afford.
13:37
danhanes
I would guess that there would be enough of "us" to perhaps help fund a few extra bits for general Apertus development
13:37
danhanes
*axiom
13:37
philippej
I guess it would depend on the intended use, if it's hobby or if it's partly backed by paid jobs ?
13:38
danhanes
for me it is really a more of a hobby - my interest is in the axiom as a platform to put to fairly non-standard purposes
13:38
danhanes
i.e., a deep ocean camera
13:39
danhanes
I have a friend who does deep ocean biology and for whom I have built some equipment.
13:40
danhanes
The deep ocean communities imaging capability is very poor
13:41
Bertl
just give us a rough number what you personally would be willing and able to afford, so we can see if we find a matching solution
13:41
danhanes
< 1000 USD would be good. Perhaps 1200 USD. In that ballpark.
13:42
Bertl
okay, noted, thanks
14:04
philippej
would this be a sensor frontend + sensor?
14:04
philippej
without zedboard I guess
14:09
Bertl
I was talking about a complete solution, so that would include the development board
14:24
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14:25
danhanes
I was thinking of board + front end (incl eng sensor) when I threw out the $1000 - 1200 USD
14:30
danhanes
it might be worth considering a similar Apertus-designed development board (i.e., not final form factor) with the "final" target HW
14:32
Bertl
understood
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16:17
Bertl
danieel: could you remind me, what was the calibration chart you are using, where did you buy? it and what was the cost?
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19:44
Bertl
off to bed now ... have a good one everyone!
19:53
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21:07
troy_s
ugh
21:07
troy_s
Bertl: You opened up a hornet's nest.
21:27
se6astian
you mean the feature wishlist email?
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ThatCantBe
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21:49
se6astian
any luck with the daylight chart yet?
22:44
troy_s
se6astian: Yep. I am completely adamant against design-by-voting (random garbage in is random garbage out)
22:44
troy_s
se6astian: I have been a twinge busy sadly. I promise I will get it tested today.
22:44
troy_s
se6astian: Have a meeting today, and I'll tackle it immediately after.
22:44
troy_s
se6astian: Were you able to do a few passes for exposure?
22:45
troy_s
Your cloud is slugging out.
22:45
troy_s
Can't wait to see if I can get a decent matrix out of it.
22:46
troy_s
(Ok... off for a few. The downloads are not happening for some reason. Slugging out or not replying or...)
22:59
se6astian
I only did a single exposure this time, but with live HDMI I got it pretty close to the useable range I hope
22:59
se6astian
time for bed
22:59
se6astian
hope the cloud will deliver soon
22:59
se6astian
good night
22:59
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