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#apertus IRC Channel Logs

2021/02/22

Timezone: UTC


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futarisIRCcloud
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BAndiT1983|away
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aombk
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06:39
se6ast1an
good day
06:41
futarisIRCcloud
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06:43
Bertl_oO
off to bed now ... have a good one everyone!
06:43
Bertl_oO
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09:20
vnksnkr
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09:23
vnksnkr
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09:28
vnksnkr
hey everyone! I'm Vinayak, an electronics and communication undergrad..I would like to be a part of the apertus organisation for GSOC 2021..I'm still looking for a suitable project as I'm interested in both HDL Based projects and The Axiom Remote Firmware...would love to hear your suggestions
09:29
aombk
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09:34
anuejn
hey vnksnkr :)
09:35
anuejn
I think the best way to start is to read the tasks on the GSOC wokboard (https://lab.apertus.org/project/view/20/)
09:36
anuejn
and then try the "challenge tasks" that are associated with them
09:36
anuejn
if you find something interesting, very good
09:36
anuejn
and if you have any questions: dont hesitate to ask
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09:48
vnksnkr
sure! I'm still exploring the workboard and I'll come back whenever I have any doubts
09:51
se6ast1an
great, many thanks vnksnkr!
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mumptai
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BAndiT1983
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BAndiT1983|away
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mumptai
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eppisai
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futarisIRCcloud
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12:08
mumptai
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13:20
Bertl_zZ
changed nick to: Bertl
13:20
Bertl
morning folks!
13:26
se6ast1an
good day
13:53
eppisai_
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eppisai
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danieel
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eppisai_
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eppisai_
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eppisai_
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14:58
se6ast1an
vup, Bertl sata meeting time?
14:58
vup
sure
14:58
se6ast1an
anuejn said he wont make it
14:58
vup
yep
14:59
se6ast1an
voice chat? jitsi?
14:59
vup
sure
14:59
Bertl
fine with me
14:59
se6ast1an
ok, give me two minutes go to our office phone booth
15:00
se6ast1an
done
15:00
vup
https://meet.ffmuc.net/sata ?
15:01
se6ast1an
https://meet.jit.si/axiom-sata
15:41
BAndiT1983
changed nick to: BAndiT1983|away
16:00
Shohei
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16:01
se6ast1an
meeting time!
16:01
se6ast1an
hello everyone
16:01
se6ast1an
who is here?
16:01
metal_dent[m]
is present
16:01
Shohei
Shohei is here
16:02
eppisai
says hello and is present
16:02
bluez
is here
16:02
Bertl
is here ...
16:02
se6ast1an
great, metal_dent[m] do you want to start like usual
16:02
metal_dent[m]
yup
16:02
se6ast1an
then: bluez, eppisai, Shohei
16:03
metal_dent[m]
last week i encountered some problems with my UART code, so i committed the state and BAndiT1983|away tried to check on his board
16:04
metal_dent[m]
it had some ISR related issues, I forgot to turn off USB ISR which could create problems
16:05
metal_dent[m]
i also need to update the read string method which receives string from host PC and stores in a buffer on the UART side
16:06
metal_dent[m]
other than this, se6ast1an and i discussed regarding gsoc tasks and qualification challenges
16:06
se6ast1an
yes, the result is here: https://lab.apertus.org/T1191
16:07
metal_dent[m]
that's it from me..
16:07
se6ast1an
many thanks!
16:07
se6ast1an
bluez, your turn!
16:07
bluez
yup!
16:07
bluez
nothing much to report though.. but a few updates
16:08
bluez
i mostly was trying to understand the prjxray's database, which nicely documents the bitstream sturcture for zynq as well
16:09
bluez
also was trying to understand the frame and bitstream structure, Bertl helped
16:10
bluez
Bertl also found a paper from 2019, which proposes some things similar to our project
16:11
bluez
but it could potentially make our tasks easier... and we also still have to do the actual implementation and comparison
16:11
bluez
thats it from me
16:12
se6ast1an
many thanks!
16:12
se6ast1an
eppisai, your turn!
16:12
eppisai
hi!
16:12
eppisai
I was working on adding a Transition task last week.But haven’t moved the transition logic to firmware yet.
16:12
eppisai
I had moved all the transition variables (transition speed,transition animation type,transition status) to centralDb,and now painter is completely free,from transition variables. So I think the virtual display driver is complete,to most extend in visualizer.
16:13
eppisai
BAndiT1983 has been helping me with everything. I’ll shorten the logic of transition this week,and then, also will start implementing the same in firmware, so it not only works on visualizer but also in real board.
16:13
eppisai
Besides I was also using some bad coding practices, have been corrected those, and now just trying to minimise them in future.
16:13
eppisai
thats it from my side :)
16:14
se6ast1an
many thanks,anything to see this week?
16:15
Shohei
May I?  while it's small...
16:15
eppisai
:D well I had all the transition types in visulizer, so push_up,swip_down works
16:16
se6ast1an
great, if you have anything to show us you can still do after the meeting
16:16
se6ast1an
Shohei: yes, please go ahead, your turn
16:16
Shohei
Thank you:)
16:17
Shohei
 I've almost done the translation of the first contents (PR contents) which I got from Mr. Rex, of which quality is enough this time.
16:17
RexOrCine
Well done Mr. Shohei. Thank you.
16:17
Shohei
:)
16:19
Shohei
It will finish tonight, and I will report that to Mr. Rex and start translating next contents.
16:19
Shohei
That's all from my side.
16:19
Shohei
Thank you.
16:19
se6ast1an
very good, many thanks
16:20
se6ast1an
mr rex would you like to share with us what " line messenger" plans are that you mentioned recently?
16:22
RexOrCine
Line is the most popular social platform in the East.
16:22
RexOrCine
That's all.
16:23
se6ast1an
so no plans?
16:24
RexOrCine
Negative.
16:24
se6ast1an
ok, many thanks
16:24
se6ast1an
quick updates from me:
16:24
se6ast1an
first batch of components were handed over to tele today
16:25
se6ast1an
what will be the second batch also arrived today from oscar
16:25
se6ast1an
I am half way through labeling/accounting/listing them and plan to finish that on thursday
16:25
se6ast1an
regarding the open component deliveries there are also some good news fortunately
16:26
se6ast1an
the 3 critical positions have been reordered from other places and are in transit or shipping already
16:26
se6ast1an
so with a bit of luck everything should arrive (though in belgium partly) this week
16:27
se6ast1an
on another front all sd card performance benchmark tests have been completed and all shipped sd cards deemed fully performant
16:27
se6ast1an
Bertl, vup and me just had a separate meeting about the next steps regarding axiom footage recording on the Quad SATA development board
16:28
se6ast1an
Bertl should have the remote test setup up and running soon, maybe he wants to talk about this himself
16:28
Bertl
sure
16:28
se6ast1an
vup/jaro would be interested in seeing if they can solve the software/gateware side of managing the writing operations and everything it entails
16:29
se6ast1an
on another front we have successfully applied for GSoC 2021 last friday
16:29
se6ast1an
with an unprecendented high number of (co-)mentors
16:29
se6ast1an
which includes: metal_dent[m], bluez and vup!
16:30
se6ast1an
the idea page has been cleaned up and updated
16:30
se6ast1an
https://lab.apertus.org/project/view/20/
16:30
se6ast1an
some tasks will still be added later as they are not fully filled
16:31
se6ast1an
I removed them from the workboard for now so google does not get distracted by unfinished task descriptions while we apply for participation
16:31
se6ast1an
new parts for upgrading the pick and place machine from robotdigg have also arrived today
16:31
se6ast1an
I am in touch with manfred who will provide the new mechanical parts for it
16:32
se6ast1an
manfred also received the ESD plastic plate we ordered just in case we need additional component trays for manufacturing
16:33
se6ast1an
and it seems we already need at least one such tray as RS sent us a cut tape reel with connectors, where every single connector is in a short cut piece of tape :(
16:33
se6ast1an
and that cut piece of tape is in a smal plastic bag
16:33
se6ast1an
which is totally unusable for a pick and place machine, in case you were wondering what I am talking about
16:33
se6ast1an
thats it from my side
16:33
se6ast1an
Bertl: your turn
16:34
Bertl
thanks
16:34
Bertl
well, as se6ast1an mentioned, we discussed SATA today and decided to make the existing SATA plugin available via the remote setup
16:35
Bertl
we are currently investigating our options here to have some kind of SATA mux and PC interface available as well to verify any read/writes done via the plugin
16:35
Bertl
we will also attach a JTAG interface (HS-2 or FTDI) to allow for external programming and control there
16:36
Bertl
PC SATA interface will likely be realized via some USB-eSATA interface on the ZBox
16:36
Shohei
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16:37
Bertl
for the Mux part, we might go with an evaluation kit from Maxime or with a custom board which can do the switching
16:37
Shohei
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16:37
Bertl
UART via Artix/TE0714 GPIO will be present as well so it should be ready to test everything we want to test there
16:38
Bertl
that's it from my side for this week
16:38
se6ast1an
many thanks
16:39
se6ast1an
anyone else with questions/comments/things to report?
16:41
se6ast1an
then I would say MEETING CONCLUDED, many thanks everyone who participated!
16:41
Bertl
thanks for having us!
16:41
metal_dent[m]
thank you!
16:42
se6ast1an
my pleasure
16:42
Shohei
Thank you:)
16:42
eppisai
Thanks!
16:44
Shohei
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eppisai
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BAndiT1983|away
changed nick to: BAndiT1983
18:02
anuejn
here is a somewhat late report from me:
18:03
anuejn
I did some hacking on the jtag code for the USB3 plugin but I have to admit that I am really confused
18:03
comradekingu
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18:03
anuejn
probably I will rewrite the jtag core (again) completely
18:05
anuejn
Also I began to refactor the nmigen-gateware (again) to make it possible to use parts in other projects
18:05
eppisai
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18:05
anuejn
thats it from my side
19:17
Bertl
off for now ... bbl
19:17
Bertl
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illwieckz
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illwieckz
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eppisai
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21:15
se6ast1an
off for today, good night
21:16
Bertl_oO
nn
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eppisai
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mumptai
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BAndiT1983
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eppisai
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