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#apertus IRC Channel Logs

2020/12/21

Timezone: UTC


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04:23
Bertl_oO
off to bed now ... have a good one everyone!
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11:32
se6ast1an
anuejn / vup: in the register explorer all computed cmv12000 parameters are empty, am I doing something wrong?
11:33
se6ast1an
cooked/raw work fine though
11:35
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11:36
vup
There are not that many computed registers
11:36
vup
I think only analog gain
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11:37
se6ast1an
correct there are only 6 computed registers
11:38
se6ast1an
all of them are empty
11:39
vup
Hmm that sounds broken, Ill take a look in a sec
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se6ast1an
thanks vup!
11:42
Bertl_zZ
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11:42
Bertl
morning folks!
11:42
se6ast1an
good day!
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11:51
se6ast1an
vup it also seems I cannot set cooked values alltogether
11:52
se6ast1an
only raw ones work
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11:59
vup
yeah thats a known bug :)
12:07
se6ast1an
right
12:07
vup
Working on a fix rn
12:07
se6ast1an
are the sequencer registers also accessible throught the register explorer already?
12:15
vup
which block are the sequencer registers again?
12:15
vup
I think we did all the ones documented here: https://wiki.apertus.org/index.php/CMV12000_Register_Blocks
12:16
se6ast1an
axiom_fil_reg is used to access them
12:17
se6ast1an
trying to find the source currently....
12:19
vup
If they are not documented in that table we most certainly didn't add them
12:19
se6ast1an
right
12:19
se6ast1an
I will see to get it documented
12:20
se6ast1an
where is axiom_fil_reg though... I cant find it anywhere on github
12:22
vup
se6ast1an: here: https://github.com/apertus-open-source-cinema/axiom-firmware/blob/fb41490/software/scripts/axiom_mp0_reg.func
12:23
se6ast1an
thanks!
12:24
vup
so we actually already have them
12:24
vup
as part of `capture_control_address_generator`
12:24
se6ast1an
yes 0x60100100
12:24
se6ast1an
is covered
12:25
vup
Bertl: the axiom_mp0_reg.func came from you, right? Is this a typo: https://github.com/apertus-open-source-cinema/axiom-firmware/blob/43ee36a0d381dc9186da2161cb0d0c359fd7df56/software/scripts/axiom_mp0_reg.func#L14 ?
12:26
Bertl
looks fine to me, what confuses you?
12:28
se6ast1an
the name "Write Buffer 0 Base "
12:30
se6ast1an
the image capture sequencer is is fil_reg 15
12:31
se6ast1an
what base address is that after 0x60100100 ?
12:34
Bertl
15+4
12:34
Bertl
15*4
12:34
Bertl
registers are 32bit (4 bytes)
12:35
se6ast1an
so 0x6010013C ?
12:35
Bertl
that should be fine, yes
12:35
se6ast1an
that is the " Button Down Override Enable "
12:35
Bertl
correct
12:35
se6ast1an
the Button Down Override Enable controls the image sensor sequencer?
12:37
se6ast1an
and I assume the last line there:
12:37
se6ast1an
0x6010013C RW [7] 0x00 Switch Override (0-7)
12:37
se6ast1an
should be 0x6010013C RW [7:0] 0x00 Switch Override (0-7)
12:39
vup
Bertl: axiom_fil_regi starts from 0x60100000, axiom_fil_reg starts from 0x60100100
12:39
Bertl
correct
12:39
vup
ok
12:41
Bertl
the register blocks we create (not the memory mappings of BRAM or other interface) consist of read-only and read-write registers
12:41
Bertl
they are separated by 0x100
12:41
Bertl
(typically)
12:41
vup
I see
12:45
Bertl
the cmv_reg, del_reg, rcn_reg and lin_reg are all BRAM or protocol mapping blocks
12:46
Bertl
but the scn_reg, gen_reg for example follow the same pattern
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BAndiT1983
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16:06
anuejn
.Hey
16:06
anuejn
I dont know if I will make it to the meeting today
16:06
anuejn
so I will write my report now
16:07
anuejn
This week I worked a lot on implementing a wavelet based compression scheme in nmigen
16:07
se6ast1an
great!
16:07
anuejn
conceptually it is quite similiar to the gopro cineform codec with a few modifications
16:08
anuejn
first a multilevel wavelet transform (with 3 levels) then compression for the high frequency parts of the image
16:09
anuejn
consisting of (optional) quantization then run length encoding of the "zero high frequency" and finally huffman encoding
16:10
anuejn
I wrote and simulation tested cores for the rle, the huffman encoding (and the bit stuffing in the end) (see https://github.com/apertus-open-source-cinema/nmigen-gateware/tree/master/src/lib/compression)
16:11
anuejn
I also wrote and simulated code for the wavelet transform (https://github.com/apertus-open-source-cinema/nmigen-gateware/blob/master/src/lib/video/wavelet.py)
16:12
anuejn
currently I am a little stuck with regards to how to reorganize / reorder / buffer the data
16:12
anuejn
that turned out to be non trivial and quite hard to think about
16:13
anuejn
however I am approaching integration of all these cores (https://github.com/apertus-open-source-cinema/nmigen-gateware/blob/master/src/lib/video/wavelet_compressor.py) but that is untested
16:13
anuejn
nothnig of that is verified on hardware currently but overall I am quite happy with the progress so far
16:14
anuejn
thanks to vup who helped me a lot :)
16:14
anuejn
thats it, I am afk for now
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se6ast1an
thanks!
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17:00
se6ast1an
MEETING TIME!
17:00
se6ast1an
who is here?
17:00
Bertl
is here ...
17:03
se6ast1an
looks like a small meeting then :)
17:04
se6ast1an
anyone else?
17:05
se6ast1an
ok quick upates from me then
17:06
se6ast1an
last week me and daniel from the factoryhub have revived the automated pick and place machine there
17:06
se6ast1an
some problems remained that daniel informed me yesterday he fixed
17:06
se6ast1an
and he is already assembling boards now
17:06
se6ast1an
so we should have that option as well aggain
17:07
se6ast1an
on thursday we visited another facility with a full SMT line made of low cost chinese machines
17:07
vup
is here
17:07
se6ast1an
quality seemed quite OK after initial configuration issues that caused placement errors and missing parts
17:08
se6ast1an
On the weekend I have assembled the optical low pass filter sample we got into the camera with a custom 3d printed holder and captured test images
17:08
se6ast1an
https://cloud.apertus.org/index.php/s/Q2JCn78CGXbLSZa
17:08
se6ast1an
intrac and alexML helped with analysing them
17:09
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se6ast1an
now we just ordered a new set of mixed panels from oshpark
17:09
se6ast1an
plus a few other small boards
17:09
bluez
* bluez is here
17:09
se6ast1an
great! :D
17:09
se6ast1an
various wiki improvements, issue reports and wifi tests as well today
17:09
BAndiT1983|away
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17:10
se6ast1an
thats it from my side I think
17:10
se6ast1an
very busy week :)
17:10
se6ast1an
bluez: do you want to report as well?
17:11
bluez
yeh just some quick updates from me
17:11
bluez
so i implemented the axi slave interface using the ip integrator
17:13
bluez
i am now trying to all the blovk design stuff using tcl scripts so we can automate most of the testing and comparing stuff
17:14
bluez
not much luck now... still tryng to get myself familiar with all these
17:15
bluez
bertl and i will work things out and finalize all these this week
17:15
bluez
thats it from me ':D
17:15
se6ast1an
many thanks!
17:16
se6ast1an
vup any news for us?
17:17
vup
well not a lot, I mainly helped anuejn a bit with the wavelet stuff and did some bugfixes in the control daemon
17:17
vup
so writing cooked register and computed registers should work again now :)
17:17
se6ast1an
it does :D
17:18
se6ast1an
Bertl please share your news with us
17:19
Bertl
not much to share this week, we finally finsihed the panel and finalized the OSHpark order
17:19
Bertl
I also finished the TE0714 based test carrier
17:20
Bertl
I update the PCB render scripts to work with the new imagemagick
17:21
Bertl
the latest panel renders can be found here ...
17:21
Bertl
http://vserver.13thfloor.at/Stuff/AXIOM/BETA/PANEL/axiom_beta_mixed_panel.top.png http://vserver.13thfloor.at/Stuff/AXIOM/BETA/PANEL/axiom_beta_mixed_panel.bottom.png
17:22
Bertl
that's it from my side for this week
17:23
se6ast1an
many thanks!
17:23
se6ast1an
anyone else with news/reports/questions/comments?
17:24
se6ast1an
should we do a meeting next week or is everyone on holidays? (not that we can go anywhere with lockdown, at least here)
17:24
se6ast1an
Dec 28th
17:26
metal_dent[m]
hi, sorry for joining late, can i report my little update? ':D
17:27
se6ast1an
sure, go ahead!
17:28
metal_dent[m]
last week i was quite busy with some personal stuff, but i was going through my python script which i implemented before and also the USB code and tried to simplified it
17:29
metal_dent[m]
also there is a new student contributor, Aman (eppisai) ; he wants to help with the checkbox code so i guided him with that
17:29
metal_dent[m]
(he has made some good progress and has understood the firmware UI code now)
17:30
metal_dent[m]
that's it from me!
17:30
se6ast1an
very nice
17:30
se6ast1an
thanks!
17:30
se6ast1an
anyone else?
17:38
se6ast1an
MEETING CONCLUDED!
17:38
se6ast1an
thanks everyone, great progress!
17:38
se6ast1an
ah, forgot to mention, see anuejns report a bit up or here: http://irc.apertus.org/index.php?day=21&month=12&year=2020#117
17:38
se6ast1an
he rereported because he had to leave
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20:42
Bertl
off to bed now ... have a good one everyone!
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Bertl
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