Current Server Time: 16:14 (Central Europe)

#apertus IRC Channel Logs

2020/12/21

Timezone: UTC


23:15
name
joined the channel
23:32
name
left the channel
23:38
BAndiT1983
changed nick to: BAndiT1983|away
23:46
_florent_
left the channel
23:47
_florent_
joined the channel
00:21
name
joined the channel
00:53
name
left the channel
01:00
name
joined the channel
01:17
name
left the channel
01:17
name
joined the channel
01:26
name
left the channel
01:28
name
joined the channel
01:46
name
left the channel
01:47
name
joined the channel
01:54
name
left the channel
02:03
name
joined the channel
02:08
name
left the channel
03:23
Bertl_oO
off to bed now ... have a good one everyone!
03:23
Bertl_oO
changed nick to: Bertl_zZ
07:12
BAndiT1983|away
changed nick to: BAndiT1983
07:30
_bluez
joined the channel
07:31
_bluez
left the channel
09:20
name
joined the channel
09:55
name
left the channel
09:55
name
joined the channel
09:55
RexOrCine1
joined the channel
09:56
RexOrCine
left the channel
10:12
name
left the channel
10:18
name
joined the channel
10:19
name
left the channel
10:19
name
joined the channel
10:20
RexOrCine1
left the channel
10:24
RexOrCine
joined the channel
10:26
name
left the channel
10:28
name
joined the channel
10:32
se6ast1an
anuejn / vup: in the register explorer all computed cmv12000 parameters are empty, am I doing something wrong?
10:33
se6ast1an
cooked/raw work fine though
10:35
name
left the channel
10:36
RexOrCine
left the channel
10:36
vup
There are not that many computed registers
10:36
vup
I think only analog gain
10:36
RexOrCine
joined the channel
10:37
se6ast1an
correct there are only 6 computed registers
10:38
se6ast1an
all of them are empty
10:39
vup
Hmm that sounds broken, Ill take a look in a sec
10:39
RexOrCine
left the channel
10:39
RexOrCine1
joined the channel
10:40
se6ast1an
thanks vup!
10:42
Bertl_zZ
changed nick to: Bertl
10:42
Bertl
morning folks!
10:42
se6ast1an
good day!
10:46
RexOrCine1
left the channel
10:51
se6ast1an
vup it also seems I cannot set cooked values alltogether
10:52
se6ast1an
only raw ones work
10:52
RexOrCine
joined the channel
10:56
RexOrCine1
joined the channel
10:58
RexOrCine
left the channel
10:59
vup
yeah thats a known bug :)
11:07
se6ast1an
right
11:07
vup
Working on a fix rn
11:07
se6ast1an
are the sequencer registers also accessible throught the register explorer already?
11:15
vup
which block are the sequencer registers again?
11:15
vup
I think we did all the ones documented here: https://wiki.apertus.org/index.php/CMV12000_Register_Blocks
11:16
se6ast1an
axiom_fil_reg is used to access them
11:17
se6ast1an
trying to find the source currently....
11:19
vup
If they are not documented in that table we most certainly didn't add them
11:19
se6ast1an
right
11:19
se6ast1an
I will see to get it documented
11:20
se6ast1an
where is axiom_fil_reg though... I cant find it anywhere on github
11:22
vup
se6ast1an: here: https://github.com/apertus-open-source-cinema/axiom-firmware/blob/fb41490/software/scripts/axiom_mp0_reg.func
11:23
se6ast1an
thanks!
11:24
vup
so we actually already have them
11:24
vup
as part of `capture_control_address_generator`
11:24
se6ast1an
yes 0x60100100
11:24
se6ast1an
is covered
11:25
vup
Bertl: the axiom_mp0_reg.func came from you, right? Is this a typo: https://github.com/apertus-open-source-cinema/axiom-firmware/blob/43ee36a0d381dc9186da2161cb0d0c359fd7df56/software/scripts/axiom_mp0_reg.func#L14 ?
11:26
Bertl
looks fine to me, what confuses you?
11:28
se6ast1an
the name "Write Buffer 0 Base "
11:30
se6ast1an
the image capture sequencer is is fil_reg 15
11:31
se6ast1an
what base address is that after 0x60100100 ?
11:34
Bertl
15+4
11:34
Bertl
15*4
11:34
Bertl
registers are 32bit (4 bytes)
11:35
se6ast1an
so 0x6010013C ?
11:35
Bertl
that should be fine, yes
11:35
se6ast1an
that is the " Button Down Override Enable "
11:35
Bertl
correct
11:35
se6ast1an
the Button Down Override Enable controls the image sensor sequencer?
11:37
se6ast1an
and I assume the last line there:
11:37
se6ast1an
0x6010013C RW [7] 0x00 Switch Override (0-7)
11:37
se6ast1an
should be 0x6010013C RW [7:0] 0x00 Switch Override (0-7)
11:39
vup
Bertl: axiom_fil_regi starts from 0x60100000, axiom_fil_reg starts from 0x60100100
11:39
Bertl
correct
11:39
vup
ok
11:41
Bertl
the register blocks we create (not the memory mappings of BRAM or other interface) consist of read-only and read-write registers
11:41
Bertl
they are separated by 0x100
11:41
Bertl
(typically)
11:41
vup
I see
11:45
Bertl
the cmv_reg, del_reg, rcn_reg and lin_reg are all BRAM or protocol mapping blocks
11:46
Bertl
but the scn_reg, gen_reg for example follow the same pattern
13:08
RexOrCine1
left the channel
13:17
RexOrCine
joined the channel
13:35
BAndiT1983
changed nick to: BAndiT1983|away
13:35
illwieckz
left the channel
13:36
RexOrCine
left the channel
13:39
illwieckz
joined the channel
13:42
RexOrCine
joined the channel
13:55
RexOrCine
left the channel
13:59
BAndiT1983|away
changed nick to: BAndiT1983
14:10
RexOrCine
joined the channel
14:43
RexOrCine
left the channel
14:43
RexOrCine
joined the channel
14:47
RexOrCine
left the channel
14:47
RexOrCine1
joined the channel
14:47
BAndiT1983
changed nick to: BAndiT1983|away
15:06
anuejn
.Hey
15:06
anuejn
I dont know if I will make it to the meeting today
15:06
anuejn
so I will write my report now
15:07
anuejn
This week I worked a lot on implementing a wavelet based compression scheme in nmigen
15:07
se6ast1an
great!
15:07
anuejn
conceptually it is quite similiar to the gopro cineform codec with a few modifications
15:08
anuejn
first a multilevel wavelet transform (with 3 levels) then compression for the high frequency parts of the image
15:09
anuejn
consisting of (optional) quantization then run length encoding of the "zero high frequency" and finally huffman encoding
15:10
anuejn
I wrote and simulation tested cores for the rle, the huffman encoding (and the bit stuffing in the end) (see https://github.com/apertus-open-source-cinema/nmigen-gateware/tree/master/src/lib/compression)
15:11
anuejn
I also wrote and simulated code for the wavelet transform (https://github.com/apertus-open-source-cinema/nmigen-gateware/blob/master/src/lib/video/wavelet.py)
15:12
anuejn
currently I am a little stuck with regards to how to reorganize / reorder / buffer the data
15:12
anuejn
that turned out to be non trivial and quite hard to think about
15:13
anuejn
however I am approaching integration of all these cores (https://github.com/apertus-open-source-cinema/nmigen-gateware/blob/master/src/lib/video/wavelet_compressor.py) but that is untested
15:13
anuejn
nothnig of that is verified on hardware currently but overall I am quite happy with the progress so far
15:14
anuejn
thanks to vup who helped me a lot :)
15:14
anuejn
thats it, I am afk for now
15:17
RexOrCine1
left the channel
15:20
se6ast1an
thanks!
15:22
RexOrCine
joined the channel
16:00
se6ast1an
MEETING TIME!
16:00
se6ast1an
who is here?
16:00
Bertl
is here ...
16:03
se6ast1an
looks like a small meeting then :)
16:04
se6ast1an
anyone else?
16:05
se6ast1an
ok quick upates from me then
16:06
se6ast1an
last week me and daniel from the factoryhub have revived the automated pick and place machine there
16:06
se6ast1an
some problems remained that daniel informed me yesterday he fixed
16:06
se6ast1an
and he is already assembling boards now
16:06
se6ast1an
so we should have that option as well aggain
16:07
se6ast1an
on thursday we visited another facility with a full SMT line made of low cost chinese machines
16:07
vup
is here
16:07
se6ast1an
quality seemed quite OK after initial configuration issues that caused placement errors and missing parts
16:08
se6ast1an
On the weekend I have assembled the optical low pass filter sample we got into the camera with a custom 3d printed holder and captured test images
16:08
se6ast1an
https://cloud.apertus.org/index.php/s/Q2JCn78CGXbLSZa
16:08
se6ast1an
intrac and alexML helped with analysing them
16:09
bluez
joined the channel
16:09
se6ast1an
now we just ordered a new set of mixed panels from oshpark
16:09
se6ast1an
plus a few other small boards
16:09
bluez
* bluez is here
16:09
se6ast1an
great! :D
16:09
se6ast1an
various wiki improvements, issue reports and wifi tests as well today
16:09
BAndiT1983|away
changed nick to: BAndiT1983
16:10
se6ast1an
thats it from my side I think
16:10
se6ast1an
very busy week :)
16:10
se6ast1an
bluez: do you want to report as well?
16:11
bluez
yeh just some quick updates from me
16:11
bluez
so i implemented the axi slave interface using the ip integrator
16:13
bluez
i am now trying to all the blovk design stuff using tcl scripts so we can automate most of the testing and comparing stuff
16:14
bluez
not much luck now... still tryng to get myself familiar with all these
16:15
bluez
bertl and i will work things out and finalize all these this week
16:15
bluez
thats it from me ':D
16:15
se6ast1an
many thanks!
16:16
se6ast1an
vup any news for us?
16:17
vup
well not a lot, I mainly helped anuejn a bit with the wavelet stuff and did some bugfixes in the control daemon
16:17
vup
so writing cooked register and computed registers should work again now :)
16:17
se6ast1an
it does :D
16:18
se6ast1an
Bertl please share your news with us
16:19
Bertl
not much to share this week, we finally finsihed the panel and finalized the OSHpark order
16:19
Bertl
I also finished the TE0714 based test carrier
16:20
Bertl
I update the PCB render scripts to work with the new imagemagick
16:21
Bertl
the latest panel renders can be found here ...
16:21
Bertl
http://vserver.13thfloor.at/Stuff/AXIOM/BETA/PANEL/axiom_beta_mixed_panel.top.png http://vserver.13thfloor.at/Stuff/AXIOM/BETA/PANEL/axiom_beta_mixed_panel.bottom.png
16:22
Bertl
that's it from my side for this week
16:23
se6ast1an
many thanks!
16:23
se6ast1an
anyone else with news/reports/questions/comments?
16:24
se6ast1an
should we do a meeting next week or is everyone on holidays? (not that we can go anywhere with lockdown, at least here)
16:24
se6ast1an
Dec 28th
16:26
metal_dent[m]
hi, sorry for joining late, can i report my little update? ':D
16:27
se6ast1an
sure, go ahead!
16:28
metal_dent[m]
last week i was quite busy with some personal stuff, but i was going through my python script which i implemented before and also the USB code and tried to simplified it
16:29
metal_dent[m]
also there is a new student contributor, Aman (eppisai) ; he wants to help with the checkbox code so i guided him with that
16:29
metal_dent[m]
(he has made some good progress and has understood the firmware UI code now)
16:30
metal_dent[m]
that's it from me!
16:30
se6ast1an
very nice
16:30
se6ast1an
thanks!
16:30
se6ast1an
anyone else?
16:38
se6ast1an
MEETING CONCLUDED!
16:38
se6ast1an
thanks everyone, great progress!
16:38
se6ast1an
ah, forgot to mention, see anuejns report a bit up or here: http://irc.apertus.org/index.php?day=21&month=12&year=2020#117
16:38
se6ast1an
he rereported because he had to leave
16:44
RexOrCine
left the channel
16:50
RexOrCine
joined the channel
16:55
RexOrCine
left the channel
16:56
RexOrCine
joined the channel
17:00
RexOrCine
left the channel
17:17
RexOrCine
joined the channel
17:21
RexOrCine
left the channel
17:23
RexOrCine
joined the channel
17:30
RexOrCine
left the channel
18:00
RexOrCine
joined the channel
18:10
illwieckz
left the channel
18:11
illwieckz
joined the channel
19:10
bluez
left the channel
19:26
BAndiT1983
changed nick to: BAndiT1983|away
19:36
BAndiT1983|away
changed nick to: BAndiT1983
19:42
Bertl
off to bed now ... have a good one everyone!
19:42
Bertl
changed nick to: Bertl_zZ
19:52
RexOrCine
left the channel
20:32
rahul_vinus_
joined the channel
20:33
rahul_vinus
left the channel
20:33
rahul_vinus_
changed nick to: rahul_vinus
21:48
Umori
left the channel
21:51
Umori
joined the channel
22:06
BAndiT1983
changed nick to: BAndiT1983|away
22:09
Umori
left the channel
22:13
Umori
joined the channel
22:46
comradekingu
left the channel
22:47
comradekingu
joined the channel