#apertus IRC Channel Logs

morning Bertl

hello!

whats the syntax to invite someone to the other channel when the nick is not registred

I cant do it....

oscar, do you see the invitation?

iirc, there is a status panel or window where this shows up, but just try to join the channel

if you have that on, it will show up in a separate tab/window, if not, it should show up on your current channel window

try again

This is Aaron Behman from Xilinx

sorry

ah, probably won't work, try /nick aaron.behman

Is there an audio channel or is this old-school IRC?

only old school :)

nope, it's all text and emoticons :)

?

Guess not. Anyway, Xilinx is interested in your project.

sounds good! may I ask why?

Hi, I'm Oscar Spierenburg, founder of Apertus.

Hello!

Sebastian, you there?

Hello everybody

Hello Guerric

Barrie is joining now

does the webclient work well for you so far?

Hello all

I Guerric Meurice de Dormale, I'm external FPGA advisor. Aaron, we met at NAB show this year (I'm working for IntoPIX). But I'm not here on behalf of intoPIX (it is after work involvment).

sure, but shouldnt we wait for Barrie?

Yes, he's joining me in the conf room now!

ah, so you are here via one nick, one voice, that's fine too :)

ok perfect, before we get started let me introduce the entire team present today

I am Sebastian Pichelhofer (Austria): Senior Product Manager, apertus° association chairman

not present at the moment: Konstantin Kim (Switzerland): Design Engineer

user: philippejadin - Philippe Jadin (Belgium): Public Relations, apertus° association advisory board

k, now we have two unanswered questions in the room:

1) why is xilinx interested in this project? and

sebastian can probably answer the second one best

I guess you have seen our Axiom website already: http://axiom.apertus.org/

Yes, have seen the site. Very cool!

so we are basically The First Ever

that got a bit messed up...

FPGA based designs are a natural choice for this open source path

So why do you see Zynq as a good fit here?

hdmi, gbit ethernet, FMC, lots of pmod headers

I see, certainly 4k res is a good fit for FPGA when doing RT pixel processing

and the combination of FPGA and CPU means maximum flexibility for us apertus° Axiom is much more than just “a product”. It’s an open camera platform - ready to evolve into things we haven’t even dreamt of today. The open and extendable nature of the Zynq matches that perfectly

the basic idea is to provide a stable platform for the community to work with, which is extensible and flexible and most importantly usable

So far the HW IP for the prototype has been custom designed and is being released to the community, but if we find open hardware IP for certain tasks (opencores) we will evalaute those as well

an important aspect for us is that somebody who wants to modify something (hardware or software) can do that easily, and trust me, there are many folks in the cinema/camera community tinkering with their toys :)

Yes, I'd imagine. So, today you are targetting a ZC7020 on the Zed board, that doesn't give you hi speed connectvity for SDI, HDMI, DP, etc. Are you planning to migrate up?

I know.

About the planning about FPGA model migration, maybe Sebastian you can list later on the milestones of the project...

https://www.apertus.org/hollywood

1. Create a proof of concept prototype that uses the CMV12000 image sensor from CMOSIS, interfaces it with an FPGA and is able to capture single frames (full resolution) and motion video (25FPS at Full HD)

Great, I'll check that out. You seem to be ahead of the pack in this movement. Are you seeing other similar projects or are you it?

4. Prepare a crowdfunding campaign with the prototype demo reel footage and the Axiom minisite detailing the plan - raise money to fund the actual development with a presale/donation campaign.

so while the hardware configuration for the prototype is already fixed, the options for the final product are still open

And zynq 030 would be a better fit than zynq020

if we will go with the Zynq it will have to be a model with high speed serial interfaces so the Z7030 would match the requirements, higher end models are not available with a free/open license so they are no option for us

Ok

At Xilinx we need to look at potential options to support you here with hi speed serial. No commitments, but something Barrie and I can investigate.

Yes, quite clear.

Many people are currently afraid of buying a camera because of the speed at which new “products” are now being released, making a lot of devices very quickly outdated and obsolete. We want to stress that Axiom will not be outdated anytime soon - it will be constantly evolving - as we rely on FPGA based designs rather than fixed “set-in-stone systems”.

We and the entire community will deliver new interfaces, codecs, firmware and significant degrees of newer functionalities with a simple software download to the camera. It is our intention to use this to create a very powerful ecosystem around Axiom, providing support alongside the development of new features.

But Axiom will also create an open knowledge library: the result of everything we have learned on the path to creating it - freely open for everyone's disposal.

What OSes are you targeting?

ok

the camera itself will most likely run Linux as OS

I see. I have too many questions, are any of you planning to attend IBC? I will be there. I also will visit csutomers in Munich and Switzerland after the show. ANyone available to meet mid sep?

Okay, Sebastian, I'll coordinate with you.

Sounds good, keep me updated on that meeting.

I will be at IBC (for IntoPIX) but as I'm only partially involved in the project, I think I'm not the best person for all your questions. And I will be there with my IntoPIX hat...

Guerric, you and I will certainly catch up over a coffee or a beer at IBC :-)

Thats what we are developing right now yes

You are, do you have specs on that? That could be a interesting revenue generator for your cause :-)

Currently it is based on a LPC FMC (because of Zedboard)

Will that FMC be open source or will you sell the FMCs?

it connects half of the 64 LVDS lanes from the CMV12000 to the Zedboard so while that means the maximum possible FPS is halfed it still means we will be able to go up to around 75 FPS at 4K

Okay, I'd like more info on that FMC. IS that public?

theoretically I'd say, since the zedboard might be the bottleneck

up to now. the 7045 is no option for us because of the license

What's an eagle file?

Right, I know. @ $5K USD it's not accessible to many individual users

about the FMC board, we have no public website about it yet as we want to wait until its running before we promote it

There is an Avnet mini module (not yet out) with the 7045 that is ~ $1.3K, but that still doesn't address WebPack. Google: "Zynq Mini Module Plus"

to add to what GuerricMDD said, the idea is to be able to spread the development effort and potentially provide sensor boards to interested developers

Thx

I had a look at vivado, after checking out ISE, but we are currently using the xflow based build process and VHDL based designs

So to get back to 1) why is xilinx interested in this project? - we would love to hear more about your perspective

This tool "free" availability is an important aspect of the project

ApertusWeb5: maybe you could help with a command line based workflow for Vivado?

There is a command flow for Vivado it's all TCL based

It's much more powerful than ISE

Thank you!

Thanks! That was nice to talk to you guys!

See you next time, Bye!