Current Server Time: 17:51 (Central Europe)

#apertus IRC Channel Logs

2019/06/21

Timezone: UTC

1
00:08
apurvanandan[m]
Hi Bertl
2
00:08
apurvanandan[m]
I think that the P and N of LVDS are swapped in the schematics of USB plugin module.
3
00:33
comradekingu
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00:50
illwieckz__
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00:52
apurvanandan[m]
Bertl, are you around? I wanted to discuss some doubts about the serial links.
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00:54
illwieckz_
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01:22
illwieckz__
changed nick to: illwieckz
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04:09
Bertl_oO
apurvanandan[m]: @LVDS, with 'swapped' you mean that P from the MachXO2 matches up with N from the Zynq, yes?
9
04:10
Bertl_oO
if so, that is okay and just means that you need to invert the signal
10
04:10
Bertl_oO
regarding serial links, we'll discuss that later because now I'm off to bed :)
11
04:10
Bertl_oO
have a good one everyone!
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04:10
Bertl_oO
changed nick to: Bertl_zZ
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05:41
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06:48
se6astian|away
changed nick to: se6astian
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06:58
se6astian
good day
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07:02
illwieckz_
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07:06
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07:42
se6astian
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07:42
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07:59
apurvanandan[m]
Bertl_oO: I meant that the _P pin of MachXO2 is named as a _N pin and vice versa in schematics of USB plugin module.
24
08:03
apurvanandan[m]
Bertl, Is out of the 6 LVDS lanes , one lane preferred for clock output ( ie clock dedicated pins) in case of source synchronous link.
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09:08
fredy
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09:08
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09:35
comradekingu
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10:07
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10:09
fredy
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11:26
Y_G
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12:16
Bertl_zZ
changed nick to: Bertl
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12:16
Bertl
morning folks!
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12:16
Bertl
apurvanandan[m]: ah, have to check that ...
36
12:17
apurvanandan[m]
Good Morning Bertl, I am using Mahesh Yayi's code as a place to start with for measuring BER , hope that isn't a issue
37
12:21
Bertl
no problem as long as it works :)
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13:10
Y_G
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13:28
RexOrCine|away
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13:51
RexOrCine
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13:55
RexOrCine|away
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14:40
Bertl
off for now ... bbl
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14:40
Bertl
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15:14
se6astian
gotta go
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15:14
se6astian
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16:43
aombk
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16:47
se6astian|away
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aombk
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16:56
aombk
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21:25
se6astian
off to bed
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21:25
se6astian
good night
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21:25
se6astian
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23:22
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