#apertus IRC Channel Logs

I cant get the pll to lock on a clock I am generating in the zynq

the same pll configuration does lock when i feed it 50Mhz from the ft601

so I suspect that there is some jitter related issue there

morning folks!

care to share some details about the setup?

so my setup is:

on the micro I have a bitstream loaded that outputs a 50Mhz differential clock on lvds5 of the plugin module slot

(and the clock output is set as LVDS_25)

the differential input is fed (more or less) directly into CLKI of the EHXPLLJ primitive

all dividers of the pll are set to 1 except for CLKFB_DIV which is set to 4

no they are not!

will try that

while I think we routed for 50Ohm?

I don't know what you used on the micro though

anyway, even if your traces are 50 Ohm differential, you will get way better results with termination than without :)

however the pll still does not lock (with internal 100Ohm termination)

counter means?

which I can read out to verify my clocks

and that counter is not counting up anymore

okay, so that means that the signal is way to weak (termination killed it) or not really differential (only one trace is connected)

and the fact that it 'worked' before was more by accident than by design

so my suggestion would be, get a scope (50MHz is not that much) and check the connector without plugin

measured from ground to that pin?

you should measure a bias voltage (DC offset) and a swing (mix to max)

(you can measure them one after the other of course)

I have currently only one probe at hand so I cant check if they are really differential but i assume that works

with the plugin module plugged in i see around 500mv peak-to-peak on one pin and 1V peak-to-peak on the other

i.e. it looks like it is only terminated on one side

ah hm... nmigen generated the io constraint only for the positive side

after fixing that the clock seems to change its amplitude with a rate of ~1Hz

things are getting... more wired

hm... when I touch the plugin module and bend it a tiny bit to the left or right i can make that phenomenon appear / disappear

hm... that seemed to be artifacts of the data i was transmitting on the other lanes

sounds like a contact problem

it's good to have an expert around :)

when i plug it into the other plugin module slot the signal looks extremely crude and has only 300mv ptp

well, 300mV is a little on the low side, 400-500mV is more what I'd expect

I think i give up for today

Bertl: your day != day of mere mortal

:)