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#apertus IRC Channel Logs

2019/05/20

Timezone: UTC


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BAndiT1983|away
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06:20
Bertl_zZ
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06:20
Bertl
morning folks!
06:31
BAndiT1983
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07:12
Bertl
back to Austria now ... Maker Faire is over, should be back around 18:00 CEST
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Bertl
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07:38
aleb
What does this mean? "This task also involves implementing features like reading multiple frames of RAW video" https://summerofcode.withgoogle.com/projects/#5659888368222208
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Philly
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09:17
Philly
Hey folks
09:19
Philly
@bertl or sebastion: how does the beta assembly make progress? Did you find fitting parts to replace those that dissapeared from the market? Any chance to, as a backer, get a beta compact until the end of 2019?
09:20
Philly
I'll check logs later. Thangs for your work!!
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09:44
vup
aleb: for a more detailed task description take a look at https://lab.apertus.org/T763
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Nira|away
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14:01
Dev__
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14:02
Dev__
Hi aleb ,
14:02
aleb
Hi
14:05
Dev__
It was written by me for the project description , implementing features like reading multiple frames " is in reference to framesever task , as oc cannot handle more than one frame right now for MLV files
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Nira
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BAndiT1983|away
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15:25
BAndiT1983
hi Dev_, regarding your email, i think you intermix some things there, frame server is not the one responsible for playback, it's still OCcore, but frame server will request necessary data from it
15:27
BAndiT1983
OCcore will deliver infos about the video, like resolution etc., frame server will use it to create basic AVI container and also ask for image data, but it's not like frame server is the one who does playback, it's only a data provider for video players/editors, you can compare it to OCcore which provides data to frame server
15:48
supragya_
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15:48
supragya_
Good evening !!
15:49
supragya_
brb
15:52
BAndiT1983
hi
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16:07
Dev__
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16:13
Dev__
Hi BAndiT1983 and supragya_ : We can view RAW inputs using Frame server too , Then why we need to implement Playback system in OC as it will also be used to view RAW inputs .
16:13
BAndiT1983
raw inputs in frame server? Dev__, are you sure what to do for gsoc?
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16:14
BAndiT1983
have you read my explanation in the logs?
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16:15
supragya_
Dev__: raw inputs are not visible thru frameserver
16:15
supragya_
you may mean debayered outputs :)
16:16
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16:16
Dev__
Yes , we will provide Debayered data
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16:17
Dev__
to Video player and that will make it viewable
16:18
BAndiT1983
Dev__, please describe the pipeline, as my doubts rise that you know what to do for the gsoc task
16:19
supragya_
please read what BAndiT1983 wrote before ... its clear there
16:21
BAndiT1983
maybe not clear enough, so i will explain it with a diagram
16:22
BAndiT1983
OCcore is providing the data and is the central point of all actions
16:22
BAndiT1983
-> frame server requests information about resolution, maybe also FPS etc., prepares AVI container and pre-calculates offsets
16:22
BAndiT1983
-> video player/editor opens the file, requests certain position from file
16:23
BAndiT1983
-> frame server intercepts the read routine and asks OCcore to provide the required frame, afterwards the frame data is sent to the player
16:23
BAndiT1983
this is a simplified presentation and will have some obstacles here and there, like requests to chunks of data, but generally it sohuld work just fine
16:24
supragya_
think of OCcore as the "meat" of what OC does
16:25
BAndiT1983
and if people are vegetarian? ;)
16:25
supragya_
frame server as BAndiT1983 said, just intercepts read requests (maybe buffers some things as well) but it just replies with what OCcore already has
16:25
supragya_
BAndiT1983: :P
16:26
supragya_
Dev__: think of it this way, if I write some bad debayering algorithm in OC, the frameserver should just send it through...
16:26
BAndiT1983
supragya_, 2 of my indian colleagues at the company are vegetarian, the 3rd one doesn't bother and eats everything
16:26
supragya_
XD
16:26
supragya_
guess what you said about Cisco came true, so much legacy code :P
16:27
supragya_
and the PRs there burn my eyes
16:27
aSobhy|away
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16:27
BAndiT1983
usual stuff, was lucky and got to work with spring boot
16:27
supragya_
are we having meeting today btw?
16:28
BAndiT1983
is planned at least, but we were at the maker faire, so Bertl_oO and se6astian|away were on the way from Berlin to Vienna today at the morning, as they drive a car, it can take a while plus traffic jams
16:28
supragya_
traffic jams, not like india :P especially Bangalore
16:28
Dev__
Yes, as explained by BAndiT1983 , It was supposed to be the prime task but then playback on top of it , made me confused
16:29
supragya_
oh yes, BAndiT1983 what is the playback slider thingy... is it OC's own video display system of sorts?
16:29
BAndiT1983
playback is not on top of it, it's the substance of the task, first playback, even simple brute force which preload frames, afterwards frame server
16:30
Nira|away
changed nick to: Nira
16:30
supragya_
hi Nira
16:30
BAndiT1983
supragya_, yes, implemented it a while ago for OC
16:30
Nira
Hi!
16:30
BAndiT1983
hi Nira
16:30
supragya_
so BAndiT1983, it is not showing anything right now I recon?
16:31
BAndiT1983
supragya_, playback slider is only a slider and buttons, was also implemented as separation between output and control
16:32
supragya_
so we are looking at how the playback thing will work logically (without frameserver) right now
16:32
supragya_
as in the logic behind getting new frames, last frames etc etc
16:32
supragya_
and the buffering mechanisms maybe
16:32
BAndiT1983
yes, first thing is to get the playback system to the state of working, then playback slider can be attached to control playback in ProcessingTest
16:33
supragya_
Dev__: are you clear on our heading?
16:33
BAndiT1983
when everything works more or less fines, then frame server requests can be processed and data delivered to it
16:34
BAndiT1983
as i said, it would be ok to preload several frames and hold the in buffer as looping video for first tests, later we need quick exchange of old frames with new ones, so the static allocator and similar stuff will be necessary, basic implementation is there, but maybe we can use something sophisticated from github to not reinvent everything
16:35
supragya_
makes sense
16:35
supragya_
something like a circular queue :P
16:35
BAndiT1983
yes, just with pre-allocated memory
16:35
supragya_
Dev__: ...
16:36
Dev__
Yes , for getting playback functionalites, we need to handle multiple frames and then we will go for frame server
16:36
Dev__
yes supragya_ , I m with u
16:36
supragya_
do you understand why did we take out the frameserver for the first task?
16:37
Dev__
For testing Purpose , i guess
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16:37
BAndiT1983
not really, first you have to implement features for playback, before moving on to frame server
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16:38
supragya_
Dev__: could you elaborate on what you think our heading is... so we all are on same page?
16:38
BAndiT1983
it's always about getting functionality first before moving on to the next tasks, also you have to do "divide and conquer" a lot!
16:38
supragya_
is there are questions, throw away :P
16:40
Dev__
supragya_: First we will head for Playbacks, just for loading frames, which will include handling of mulitple frames(which is not supported it)
16:40
Dev__
yet*
16:41
Dev__
Which includes communication channel between OCcore and UI system
16:41
supragya_
have you audited the code regarding this?
16:41
Dev__
to load Frames(Debayered )
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16:43
BAndiT1983
loading files should be easier now, added automatic detection some weeks ago
16:43
Davelister
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16:43
Davelister
good evening
16:43
BAndiT1983
hi Davelister
16:44
supragya_
BAndiT1983: so currently, if i have a set of RAWs in a folder, the sequence could be read through some mechanism in chronological order already?
16:44
Dev__
As far as i was able to understand. For handling Multiple Frame , we can use static allocators which i had proposed in My proposal too
16:44
BAndiT1983
supragya_, suppose so
16:44
supragya_
Dev__: static allocators are something different
16:45
supragya_
could you explain what you mean by static allocators?
16:45
BAndiT1983
Dev__, don't focus on higher difficulty tasks, just start with a big chunk of memory, allocate as much as you need for e.g. 15 frames and load the whole image data sequentially into it, but you have to keep track of where the data is for each frame, so you can request it, e.g. by frame number
16:46
BAndiT1983
usually static allocator should be just one object, which could provide multiple big pages (blocks, chunks) of memory
16:46
supragya_
static allocator, Dev__ are just big chunks of preallocated memory...
16:46
Dev__
yes
16:46
supragya_
they can save anything... whatever you feed
16:47
supragya_
it's like (debayered data) -> [static alloc, just for prefetch] -> rendering on screen
16:47
BAndiT1983
http://www.gingerbill.org/article/2019/02/16/memory-allocation-strategies-004/
16:48
supragya_
maybe we can skip it and render directly... just as a starting point
16:48
supragya_
BAndiT1983: ?
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Fares
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16:48
supragya_
Davelister: hello :)
16:48
BAndiT1983
only OCImage should be stored sequentially, but maybe also only image data and referenced from OCImage, but lets discuss it at appropriate point, so just say we will keep whole OCImage with image data in each bucket
16:49
BAndiT1983
supragya_, it would be better to get a big chunk and store data there, as it is working already, but in very basic way
16:49
supragya_
if it's there, its good
16:49
BAndiT1983
https://github.com/apertus-open-source-cinema/opencine/blob/dev/Source/ProcessingTest/Presenters/ProcessingPresenter.cpp
16:50
BAndiT1983
big parts of OC will be reworked, but still trying to get proper code coverage report first, so playing around with some dummy project
16:50
Dev__
This the approach which i thought, not for stating point but I thinl this is what we can do : Take position of frame into static allocator or big chunk memory and then send (debayered frames) to OC
16:50
BAndiT1983
when it works, i will start to dissect OCcore and re-assemble it
16:50
supragya_
dumppng works?
16:51
BAndiT1983
Dev__, what do you mean "send to OC"?
16:51
supragya_
Dev__: what?
16:51
Dev__
But as lasrge number of frames will cause problem of memory ,
16:52
supragya_
??
16:52
BAndiT1983
let me upload my diagram, hope i have it on the laptop
16:52
Dev__
send to OC : Load frames
16:53
supragya_
Dev__: OC includes OCcore, OCImage Presenter
16:53
Dev__
which we will controlled by slider
16:53
supragya_
what are your refering to?
16:53
Davelister
hello supragya_
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Fares
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16:54
supragya_
Davelister: I don't think you are here as a gsoc guy? have i seen you in 2018?
16:54
supragya_
I think i did :P
16:54
Davelister
supragya_: not at all
16:54
supragya_
btw, hi everyone... who all are here for GSoC? XD
16:54
Davelister
I have only been here on IRC
16:55
BAndiT1983
supragya_, haven't you learned about googling people yet? ;)
16:55
Davelister
BAndiT1983: I hate when people do that :-)
16:55
supragya_
BAndiT1983: you are a stalker... I remember
16:55
BAndiT1983
looked already up where Davelister worked and so on, very easy to find, whois is our friend :D
16:56
Davelister
aye
16:56
BAndiT1983
nah, not stalker, but people post so much, anybody can look it up
16:56
supragya_
Dev__: you here?
16:56
BAndiT1983
even human resource departments do it a lot, so think twice before uploading party photos on facebook or similar
16:57
supragya_
ugh HR
16:57
BAndiT1983
yeah, human resource has some taste to it as a term
16:58
Dev__
Yes supragya_
16:59
Dev__
I will try to explain which i could understand for playback using some doc
16:59
Dev__
asap
17:00
supragya_
Here are a few references:
17:01
supragya_
How OCcore provides meta: https://github.com/apertus-open-source-cinema/opencine/blob/dev/Source/OCcore/Image/OCImage.cpp
17:01
Dev__
Yes please
17:01
Bertl_oO
changed nick to: Bertl
17:01
Bertl
back now ...
17:02
Dev__
hello Bertl
17:02
BAndiT1983
hi Bertl, how was the trip?
17:02
Bertl
Dev__: hey, how's it going?
17:02
supragya_
exemplar downscaler: https://github.com/apertus-open-source-cinema/opencine/blob/dev/Source/OCcore/Image/BayerFrameDownscaler.cpp
17:02
Bertl
BAndiT1983: long.
17:02
Bertl
but otherwise uneventfull
17:03
supragya_
and obv, the BAndiT1983's link
17:03
supragya_
Bertl: do you remember me :P
17:03
Dev__
Fine Bertl : - )
17:03
BAndiT1983
still searching for the diagram of OC structure
17:05
supragya_
BAndiT1983: could you point me to the sequential loading code?
17:06
BAndiT1983
don't remember where i have placed it, but maybe it was in some archive their
17:06
BAndiT1983
but sequential loading is rather simple, just get the list of files in the folder, use Qt methods, and iterate through it
17:06
Bertl
supragya_: who are you again? :)
17:07
BAndiT1983
https://lab.apertus.org/T497
17:07
BAndiT1983
there is the diagram of general structure
17:07
Bertl
supragya_: of course I remember you!
17:07
BAndiT1983
in case it's not clear how things interact
17:08
supragya_
Bertl: how are things going? heard we are going NASA XD
17:08
BAndiT1983
nasa or nada will be announced in the summer
17:08
Bertl
more ESA, but yes, maybe ...
17:08
BAndiT1983
Bertl, but there is also some NASA stuff besides plato
17:09
Bertl
ah, didn't know that
17:10
Dev__
I will see it BAndiT1983, and i will try to start simple like loading frames by just saving them in memory for less number of frames and then comes static allocator which will optimise use of memory
17:10
BAndiT1983
Dev__, you could start by modifying current ProcessingTest code as it provides the basics
17:11
supragya_
Dev__: it would be appreciated if we could communicate on a regular basis using emails. That helps keep logs and everyone in the loop.
17:11
supragya_
Get the idea of what needs to be done and your IDE etc setup before coding period starts :)
17:11
supragya_
Dev__: try bringing in one frame, then a sequence
17:12
supragya_
one step at a time
17:12
Dev__
Okay supragya_
17:16
supragya_
before we leave (atleast me), any questions on the task?
17:17
Dev__
No supragya , I will try to understand more
17:18
Dev__
Thanks for your time :)
17:20
BAndiT1983
Dev__, please create a task list and dissect it in subtasks, you can use some mind map software which is really good for such things
17:21
supragya_
mind map 0.o
17:21
BAndiT1983
e.g. -> http://freemind.sourceforge.net/wiki/index.php/Main_Page
17:21
BAndiT1983
supragya_, what's the matter? :)
17:22
supragya_
BAndiT1983 knows cool things - Project IGI, mind maps ... :)
17:24
BAndiT1983
sometimes you have to get things done by using such tools, if you have too many ideas
17:25
BAndiT1983
counted at least 5 tasks i have to do for apertus in the next time, so Steam has to pause a bit
17:25
Davelister
hello Bertl
17:27
felix_
are we going to chat about the fast serial links today? had that in my calendar starting 25 minutes ago
17:27
BAndiT1983
fist we should check if students have something to report or ask, e.g. Nira
17:27
Davelister
felix_: I am here for hardware topics, so I think so
17:31
Dev__
left the channel
17:32
Nira
Not for the moment, sorry!
17:33
BAndiT1983
ah ok, just ask if you need something
17:34
BAndiT1983
anybody else?
17:35
BAndiT1983
a forest of raised hands it seems
17:35
BAndiT1983
well, felix_ and Davelister the stage is yours please continue
17:37
felix_
i'm mostly here to help if the gsoc students working on that have questions. not sure what we need to discuss today
17:38
BAndiT1983
ah, my mistake, not following fpga and electronics discussions much at the moment
17:40
supragya_
left the channel
17:41
BAndiT1983
Bertl, a bit different topic, regarding axiom remote, will try to use JTAG through platform cable, but is there some universal chip programmer out there, which is not costing arm and leg to acquire? had USBprog long ago and it could be outfitted with different programmer firmware for different MCUs and other chips
17:42
BAndiT1983
something which supports JTAG and ISP would be good
17:47
Davelister
BAndiT1983: are you speaking about the JTAG TAP of the SoC or for another microcontroller?
17:47
Davelister
if it is the SoC one, I am afraid you cannot, except with the Digilent programming cable
17:47
BAndiT1983
at the moment the focus is on pic32mz, but maybe i can re-use such a device later for other things like atmega etc. etc.
17:48
Davelister
oh, I think I got some schematics for a PIC32MZ JTAG somewhere :-)
17:49
BAndiT1983
waiting for Bertl to tell me the pinout, to try openocd with xilinx platform cable, otherwise i have some evaluation boards, which have a programmer attached to them and which can be broken off when not required anymore
17:49
Davelister
ah gosh, I don't know how well OpenOCD works with Zynq SoC
17:50
BAndiT1983
nah, the zynq board has it's own stuff, i'm trying to work on the axiom remote board
17:50
Davelister
I suppose you only want to debug software on the PS right?
17:50
Davelister
oh ok ok :-)
17:50
Davelister
sorry
17:50
apurvanandan[m]
Hi Bandit, can you discuss about openocd here on irc, it would help me
17:50
BAndiT1983
no problem, as i said, trying to avoid fpga at the moment, as bloody amateur there ;)
17:51
BAndiT1983
apurvanandan[m], what do you want to know?
17:52
apurvanandan[m]
How to use platform cable with openocd
17:52
felix_
using openocd with an artix7 works great; haven't used it with a zynq though
17:53
felix_
to write an image to the flash, the flash proxy bitstreams need to be somewhere where openocd can find them; not sure if they ship them nowadays
17:54
BAndiT1983
have only tried it with ISE for my spartan 6 board and virtex 5 or 4, but it worked after some fiddling, but as i lack proper ICSP/JTAG device, would try to access pic32 with the platform cable
17:54
felix_
i use openocd for flasing in a test stand for a commercial project, so i don't have to fight the vivado programmer on that box
17:54
BAndiT1983
maybe JTAG is compatible
17:55
apurvanandan[m]
I want to use it for virtex 5
17:55
BAndiT1983
apurvanandan[m], which OS?
17:55
apurvanandan[m]
Ubuntu 18
17:55
apurvanandan[m]
I have ISE installed
17:55
apurvanandan[m]
14.7
17:55
BAndiT1983
is the cable recognized?
17:55
apurvanandan[m]
Ubuntu 18.04
17:56
apurvanandan[m]
Actually I don't know where to start with, could you just brief what are steps involved
17:56
BAndiT1983
my ISE has also worked under ubuntu with this cable, tried to develop some simple demo with LEDs on the board, worked somehow, but plainly but coincidence of me fiddling with signals :D
17:57
BAndiT1983
there are great tutorials on google, as it's a bit difficult to explain on IRC
17:57
BAndiT1983
https://elinux.org/Install_Xilinx_USB_cable_drivers_for_Ubuntu
17:57
BAndiT1983
used this also
17:58
BAndiT1983
what does IMPACT says when you try to open it and to connect to the hardware?
17:58
apurvanandan[m]
No, I meant the cable is setup and have been using it since long. I wanted to know how to use openocd with the cable
17:58
apurvanandan[m]
iMPACT is working great
17:59
BAndiT1983
ah, openocd should support it as it is
17:59
BAndiT1983
through usb-jtag module or so
18:01
apurvanandan[m]
Ok, got it!
18:01
BAndiT1983
according to google this guy has implemented it -> http://ixo-jtag.sourceforge.net/
18:01
BAndiT1983
searched explicitly for DLC9G platform cable
18:07
Bertl
so the JTAG pinout on the Axiom REMOTE is the following:
18:07
Bertl
if you look at the board layout (or board itself) and the JTAG is at the upper edge
18:07
Bertl
(top side of the remote facing up :)
18:08
Bertl
then the upper left pin is pin 1, and the whole upper row is GND
18:08
Bertl
the lower left pin is VCC (pin 2) then TMS (4), TCK (6), TDO (8) and finally TDI (10)
18:09
Bertl
pin 12 and 14 are unused
18:09
BAndiT1983
you have also mentioned some flat JTAG pins, as my double row connector is not fitting, because of bigger latch
18:09
Bertl
ICSP is on the lower edge (opposite site of the board) and the pins are labeled there
18:10
BAndiT1983
don't have ICSP device here
18:10
Bertl
there is only the one JTAG connector (2x7 pin) on the Rremote
18:10
Bertl
*Remote
18:10
BAndiT1983
ok, will tri to reduce the lath size then
18:10
BAndiT1983
*try
18:11
Bertl
but you can get a cheap PICkit (preferably PICkit2 or an even cheaper chinese clone)
18:11
Bertl
which does handle ICSP and can be used to program the PIC32MZ
18:11
BAndiT1983
already considered, but haven't looked around yet
18:12
Bertl
if you want to use the Microchip tools (they suck somewhat) you can also get a recent PICkit3 or PICkit4?
18:13
BAndiT1983
plan is to use the docker container, which builds our firmware for axiom remote already, so i don't have to bother with their tools under linux
18:13
BAndiT1983
but first i have to connect to the pic
18:13
Bertl
another option would be to use 2mm dupont cables and make a cable connection to the jtag port
18:14
BAndiT1983
am actually on something like it at the moment, at least for first tests
18:14
Bertl
Davelister: so if I got that right, you want to help out with hardware design, yes?
18:17
Bertl
I remember we had a brief encounter early 2018
18:22
Davelister
Bertl: exactly
18:23
Nira
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18:26
Davelister
If I can give the project some help, that would be with pleasure :-)
18:26
Davelister
(including manufacturing processes)
18:29
Nira|away
changed nick to: Nira
18:38
Davelister
I suppose you use KiCad
18:38
Davelister
(according to the files extensions)
18:38
BAndiT1983
mostly eagle, as far as i remember
18:38
BAndiT1983
at least i've used it to open schematics today at the morning
18:41
Davelister
ok, should work with KiCad so far
18:42
BAndiT1983
just did a quick search but couldn't find IRC logs, where the guys discussed problems here and there in kicad
18:42
BAndiT1983
let me try again, but maybe anuejn and vup remember when it was, as they were involved
18:43
Davelister
don't worry, I'll have a quick lookaround by myself
18:43
Davelister
thanks for your help ;-)
18:43
BAndiT1983
no problem, haven't done anything special
18:43
BAndiT1983
ah, here it is -> http://irc.apertus.org/index.php?day=10&month=05&year=2019
18:44
vup
the main reason for using eagle afaik was that when the hardware design started kicad wasn't that great yet
18:44
vup
and Bertl was used to eagle
18:44
Y_G
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18:45
Davelister
ok ok
18:45
Davelister
I ask the question cause I work a lot with KiCad, and even use it in a profesionnal context
18:45
vup
unfortunately the pcb's aren't really trivial, and the eagle importer of kicad can't handle them well (keepout areas are missing, the rounded traces are imported badly, etc.)
18:46
Davelister
I see
18:46
BAndiT1983
Davelister, cool
18:47
Davelister
would it be a problem if we use KiCad for the new boards? The software is now as good as Altium for some parts (Step generation)
18:47
BAndiT1983
:D the bad word with A ;)
18:47
vup
i don't see any problems with using kicad, and the long term plan is to switch to kicad someday
18:47
vup
but Bertl should give his ok, as he has done all the current boards
18:47
Davelister
sounds a good plan, I may even help a bit about how to use it in a shared project
18:48
Davelister
of course
18:48
Bertl
KiCad is perfect for new designs
18:49
Davelister
BAndiT1983: it is not so bad word you know, Octopart is owned by this company
18:49
Bertl
as vup mentioned, one (hopefully not so far) day we'll simply switch to KiCad
18:49
Davelister
but it is for a different public ;-)
18:49
Davelister
Bertl: good. Is there any requirements in terms of costs?
18:50
BAndiT1983
as long as kicad will not be a bit of mess like freecad
18:50
Bertl
we try to make it work with the OSHpark stackup and services whenever possible
18:51
Bertl
but not because the PCBs are so cheap (they are to some extend and for small quantities), because it allows anybody on this planet to simply 'order some boards' and build them
18:52
Davelister
ok I see. What about multiple BoM?
18:52
Davelister
Such as for a board - Cheapest BoM
18:52
Davelister
- Average board
18:52
Davelister
- Deluxe (X5R capacitors everywhere yay!)
18:54
Davelister
is this a common practice here?
19:05
Bertl
well, as you probably know already, we have some octopart BOM lists (partially outdated)
19:06
aombk
left the channel
19:06
Bertl
a long term vision is to have some kind of automatic BOM which knows the 'relevant' attributes for each component and can tell you where to get it
19:06
Bertl
except for special parts, we try to use components which are readily available via the typical distributors, i.e. mouser, digikey, arrow, farnell, ...
19:09
felix_
is quite happy that he didn't buy into the altium ecosystem, but went the kicad route instead. a colleague did and she isn't really happy with it; especially for the price compared to eagle or kicad
19:11
Davelister
Bertl: great
19:11
BAndiT1983
eagle is a double-sided sword, as autodesk is not my favourite company, after they've bought all the big 3d modellers and raised the prices beyond hobby area or switched to subscriptions
19:12
Davelister
Bertl: is there any project with the highest priority where I could help?
19:12
BAndiT1983
still using fusion 360, as freecad has a lot of quirks, but would like to find affordable and intuitive
19:12
Bertl
BAndiT1983: we are still all using Eagle 7.7.0 which is the last version before the switch
19:12
felix_
ok, my first encounter with one of the kicad people was really bad and there's also no pleasant way to upstream things to the main kicad repo, so i have some patches sitting on github or my local machines, but the program itself isn't worse than other tools for what i do (usually 4-6 layers with some high-speed stuff)
19:12
BAndiT1983
felix_, what happened?
19:12
Bertl
BAndiT1983: doesn't require any online stuff or registration, subscription, etc
19:12
Davelister
felix_: I was lucky, I got Jean Pierre Charras as one of my teachers :-)
19:13
BAndiT1983
Bertl, just used my usual autodesk account to get eagle, had it already since my student days, no big deal, but would also opt for kicad later, when the schematics are adjusted for it
19:14
Bertl
Davelister: one quite important and also challenging task would be the 'Smart' Interface Board
19:14
Davelister
(who, by the way, good to know for a project such as Apertus Axiom, has made some patents for Aaton cameras)
19:14
felix_
well, i tried building kicad for osx and encountered spme problems and wrote a bug report that included a fix; unknowingly i hit the big hornet nest that noone wanted to touch at that time, and i got yelled at by the maintainer, that it should be obvious that i'm doing things wrong and that he wanted to nuke the part i hit the bug anyway and that it just causes trouble. well, after that i didn't bother to
19:15
felix_
fix things and improve the situation on osx
19:15
Davelister
felix_: you got angry mac os x users :-P
19:15
felix_
some later interaction with someone else was much more pleasent
19:15
Davelister
(I work with Mac os x too)
19:15
BAndiT1983
oha, sounds like a great start
19:15
Bertl
Davelister: we are currently using a 'Dummy Interface Board' to connect half of the 64 LVDS channels from the sensor to the Zynq on the MicroZed which basically halves the throughput
19:16
Bertl
as the name implies, it is basically a bunch of connections without any logic on it
19:16
Davelister
ok
19:16
Bertl
the plan from the beginning was to have an Interface Board which works as gearwork between sensor and Zynq
19:16
felix_
yeah... and it's not that i didn't spend two evenings to get things running and would have spent another 5 evenings to make things smoother. anyway, enough being grumpy about things ;P
19:17
Davelister
Bertl: I suppose no power supplies shall be implemented on it
19:17
Davelister
and it is more or less a high-speed signals dispatch board?
19:17
Bertl
so this basically means up to 80 LVDS channels with up to 750 MHz towards the sensor board and 36 LVDS channels with up to 1.2GBit/s each to the Zynq
19:18
Bertl
power supply should be available from the power board (two power rails are reserved for the interface board there)
19:18
Davelister
ok
19:18
Bertl
it probably makes sense to go for a 7 Series FPGA (e.g. Artix)
19:18
Bertl
but that is not a requirement
19:19
Bertl
it needs to work well with the Zynq interface
19:19
felix_
yeah, one or two artix7 are likely the way to go; not sure what altera/intel has to offer there
19:19
Davelister
why the Zynq does not handle the signals? Was it an I/O or area limitation?
19:19
Bertl
and be able to potentially connect all the 80 LVDS pairs with the 36 Zynq pins
19:20
Bertl
yes, it is simply a limitation of the MicroZed we are using
19:20
felix_
the zynq board didn;t have enough io pins
19:20
Davelister
I see
19:20
Bertl
the sensors we currently support use up to 600Mhz LVDS
19:20
Davelister
I am afraid 1.2Gbits would be the limit of the Zynq7020
19:20
felix_
i have my doubts that that board can be made using the 4layer oshpark stackup
19:21
Bertl
well, it might not be possible, but then it might just work
19:21
Davelister
The 7015 or 7030 can provide GTX pins
19:21
Bertl
I did some breakout tests and it wasn't looking that bad
19:21
felix_
doing the sdi board on 4 laybers was already a bit tough in some areas and i didn;t need to escape route a lot of io pins there
19:21
Davelister
ok
19:22
Bertl
Davelister: yeah, different Zynq provide MGTs and more I/Os, but that's currently not an option as it would basically be a redesign
19:23
Bertl
we had a look at the PicoZed (which has those) but the connectors are in 'unfortunate' places and the board doesn't provide any of the PS features (Ethernet, USB, etc)
19:23
felix_
having GTP interfaces on the axiom extension connectors would eliminate the need for the artix7 on the sdi and sata boards, but that's something for the axiom delta ;P
19:23
Bertl
so it would complicate things more than necessary
19:24
Bertl
i.e. the 'Smart' Interface Board (or just Interface Board) would be able to accomodate all kind of sensors with a reasonable interface and speed and allow us to get the most out of the sensor as well
19:24
felix_
Davelister: if you want to have a look at the sdi board https://github.com/felixheld/AXIOM-photonSDI-hw
19:25
Bertl
it also could work well as sensor simulation board which would allow developers to test stuff without actual sensor
19:25
felix_
sadly didn't get around yet to work on the bringup again :(
19:25
Davelister
Bertl: sounds like a plan to me :-)
19:25
Bertl
so all in all, it is a quite important piece which we didn't find the time to work on yet
19:26
Davelister
is the 32 LVDS channels fixed yet?
19:26
Bertl
it is 36 LVDS (2x18) on the Zynq side and 80 LVDS (2x40) on the sensor side IIRC
19:27
Davelister
oh sorry, wrong reading :-)
19:27
Bertl
but you can easily see that when you check the dummy interface board schematic/layout or the interface of the main board and the sensor frontend
19:27
Bertl
the interface is designed to be rotation symmetric, so it is probably easy to read and understand as well
19:28
Bertl
if you have any questions about the interfaces, just let me know and I'll try to answer as quickly as I can
19:28
Davelister
thank you very much
19:28
Davelister
I'll have a look this evening
19:28
Bertl
thank you!
19:36
vup
Davelister: you should be able to find most schematics / boards here http://files.apertus.org/HARDWARE/AXIOM/BETA/
19:38
vup
felix_: one possibility for providing the plugin modules with gtp's could be replacing one (or both) of the machxo2's used as for io extension with a artix7
19:39
Davelister
thank you very much vup
19:39
Bertl
yes, that is another long term plan indeed ...
19:41
vup
Davelister: not sure if you found that site yet, but the general structure of the pcb's is described here https://wiki.apertus.org/index.php/AXIOM_Beta/Camera_Structure (especially chapter 7)
19:41
Davelister
yes I read it
19:41
vup
great
19:42
Davelister
I'll get a few days to get a complete overview I think
19:42
Davelister
and then I'll give you some inputs :-)
19:42
vup
sounds good
19:43
Davelister
oh, one more question
19:43
Davelister
is there any EMC requirements?
19:44
Davelister
(I am trained for EMC and electrical safety, but for bigger equipments :-) )
19:44
vup
Bertl will have to answer that question
19:49
Bertl
well, we try to keep emissions as low as possible and also try to design our boards somewhat resistant
19:50
Davelister
ok, the usual stuff :-)
19:50
Bertl
vias do not cost extra at OSHpark, so you can have as many as possbile (stitching)
19:50
Davelister
great :-)
19:50
Davelister
(who still charge for vias?)
19:51
Bertl
most local PCB manufacturers
19:51
Davelister
in Austria?
19:52
Bertl
yup, and Germany as well
19:52
Davelister
strange, old school manufacturers I suppose?
19:53
Bertl
drill hits are still expensive, so yeah, they try to compensate for it this way
19:54
Bertl
OTOH, OSHpark stil doesn't do EC, so PCBs can have defects
19:54
Davelister
mmhh, I have some good partners in Europe
19:55
Davelister
maybe later we can give them some calls
19:55
Bertl
might be interesting if they can do OSHpark stackups
19:55
felix_
vup: i think we talked about that at the congress, but i wasn't too convinced yet
19:56
vup
felix_: totally possible
19:57
Davelister
Bertl: by stackups, you speak about multiple PCB Layers aren't you?
19:57
Bertl
yes, we need to match what we get at OSHpark (core/prepreg thickness, copper, material, etc)
19:58
Bertl
because we don't want to maintain two separate designs and still want to keep the OSHpark option
19:58
Davelister
that's now the common delivery for most of the industrial providers :-)
19:59
Davelister
(not sure it matches the price however... It will be subject of a future discussion I suppose)
19:59
Bertl
of course
19:59
felix_
i think my main issue was compatibility; old boards driving signals on those pins might fry the gtps and you can only route one gtp if you want to reuse the signal pins on the axiom connector that go to the machxo2 without compromising too much on signal integrity
19:59
Davelister
(the electronics industry is full of surprises)
20:03
felix_
with old boards i meant extension boards, not the board taht currently has the two machxo2
20:03
vup
felix_: well the io voltage is supplied by the beta, so frying them should not be a problem
20:04
felix_
no, other way around
20:04
vup
with one gtp you could already do a lot of stuff that currently needs a extra fpga
20:04
felix_
the extension board driving the pins that currently connect to the machxo2 and then to the gtp
20:04
felix_
yeah
20:06
felix_
how many lvds lanes are between the microzed and each machxo2?
20:07
Bertl
the RFW has 1 (one) and the RFE has 2 (two) :)
20:07
felix_
uh, that's not many :/
20:08
vup
would the io voltage level of the pins connected to the machxo2 not be decided by PCIE_{N,S}_VCCIO ?
20:08
Bertl
but a replacement for the MachXO2 could get all the 12 LVDS going to the plugin slots as well
20:08
felix_
true that
20:09
felix_
so basically a proxy artix 7 inbetween
20:09
Bertl
yep, which also handles all the MachXO2 'low speed' shield interfaces
20:09
felix_
i kinda like the idea
20:10
Bertl
we too, we too!
20:11
felix_
maybe add a high-speed mux (those are rather cheap), so that some of the lvds lanes can be routed to the gtps instead
20:11
Bertl
probably not possible with the limited board space, but yeah, would be nice
20:12
felix_
if in doubt, add another board to the stack to get some more board space ;P
20:16
Bertl
will do, thanks for the hint! ;-)
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Nira
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21:38
Bertl
off to bed now ... have a good one everyone!
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Bertl
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