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| 23:21 | mookyj | Hi I gave the cmv12k-adapter-v1.1 a look over onthe schematic you might add a termination resistor to the lvds clk in to the sensor. as to the board it appears that it is a work in progress?
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| 23:23 | mookyj | are there any assembly views? it is not clear as to how you are getting heat away from the sensor. Forgive my ignorance as I get up to speed
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| 23:24 | Bertl | http://iloveubuntu.net/pictures_me/Aximom%20Alpha%20second%20prototype%20main.jpg
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| 23:25 | Bertl | without cooling, the sensor gets about 50-55°C, 45°C below the sensor
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| 23:26 | Bertl | with cooling (the big fan) it stays about 4-5°C above room temperature
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| 23:32 | mookyj | any metal contacting back of sensor?
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| 23:32 | Bertl | nope, nothing there in the alpha
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| 23:32 | Bertl | we plan to put a peltier at the back of the sensor in gamma
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| 23:33 | Bertl | btw, thanks for spotting the missing termination!
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| 23:33 | mookyj | dark current doubles roughly every 3-4°C
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| 23:34 | mookyj | its the stuff one worries about onthe siicon side, some library IP for io's have termination, some don't
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| 23:34 | mookyj | LVDS io's are a significant structure on the pad frame
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| 23:43 | mookyj | that big connector in the center keeps you from heatsinking away from the sensor
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| 23:43 | Bertl | correct
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| 23:44 | mookyj | if you could dump into a xilinx on same board you could greatly reduce pin count assuming that you could do all your post processing at a single port 14-20 bits (depends on where you allocate the LUT)
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| 23:45 | Bertl | hmm?
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| 23:46 | mookyj | with John's (Andon) socket you might have room to machine a piece to pull heat out
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| 23:47 | mookyj | ah I went back and looked you don't use all the ports on the sensor
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| 23:47 | Bertl | currently not, this will change in the future (i.e. for gamma)
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| 23:48 | mookyj | there are so many tradeoffs for each solution, personally I have wanted to do a large format module head forever, and Panavision would never go for it
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| 23:49 | Bertl | but I'm not sure I can follow you with the 'dump into a xilinx'
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| 23:49 | mookyj | much easy to do that, and design the rest of the camera seperately, conquering the unique design issues
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| 23:49 | mookyj | my term for pulling all the data off the sensor
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| 23:50 | Bertl | well, that's what we do with 'the xilinx'
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| 23:50 | mookyj | get it off quickly then consolidate where you can to reduce complexity downstream
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| 23:50 | mookyj | could be any large fpga
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| 23:50 | Bertl | the sensor is directly connected to the zynq
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| 23:51 | Bertl | what would be the advantage to add another FPGA before that?
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| 23:51 | mookyj | if the fpga is right next to the sensor, you drive much shorter lines at 300-400mhz
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| 23:51 | mookyj | possibly
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| 23:51 | Bertl | okay, but I still have to get the data to the zynq then
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| 23:53 | mookyj | it is my thought that if the front end module grabbed the data, did the basic corrections unique to the sensor, then sent iot to the main board camera, you could design a camera that would adapt much easier to other sensor platforms
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| 23:53 | Bertl | but it would also consume twice the power, cost more money, produce more heat?
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| 23:54 | mookyj | yes your would, but you could in a way standardize the frame data, and use the Zynq to handle the camera functions, formatting, and outputs that are required
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| 23:54 | mookyj | probably not double. but likely more
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| 23:55 | Bertl | okay, but I don't see an advantage there ATM
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| 23:55 | mookyj | it would take some looking looking at the overall system to see what goes on be clock, per instruction to see if any savings owuld occur
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| 23:57 | mookyj | I am looking at it purely as getting data to something more universal, and reduce the signal loops at the sensor
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| 23:57 | mookyj | oops mis type; per clock
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| 23:57 | Bertl | we would have to process the same amount of data in any case
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| 23:58 | mookyj | anyway just a thought
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| 23:58 | Bertl | it just would get sent over LVDS twice
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| 23:58 | mookyj | well maybe, depends on where you combine the ports
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| 23:58 | Bertl | combine what ports?
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| 23:59 | mookyj | you have two 16bit ports from the sensor correct
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| 23:59 | Bertl | the sensor has 64 LVDS pairs in full conenction, we use 32 pairs in our setup
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| 00:00 | Bertl | 16 top, 16 bottom
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| 00:00 | Bertl | each transfers up to 12 bit of a pixel from two rows
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| 00:02 | mookyj | this may make a better solution should you go 64, as you can combine reduce downstream pairs,m however i am not sure what limitations there may be on the processing side
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| 00:02 | mookyj | all good on paper :)
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| 00:03 | Bertl | well, it would require higher LVDS rates, so more power in the transfer, but less pins
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| 00:03 | mookyj | well I have to get home for dinner, thanks for the info, and helping me understand a bit more of the project
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| 00:03 | mookyj | agree on pwer
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| 00:03 | Bertl | no problem! thanks for looking into it
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| 00:04 | mookyj | Let me know when and where I can help!
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| 00:04 | Bertl | will do
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| 00:21 | Bertl | off to bed now ... have a good one everyone!
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