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| 11:31 | Bertl | morning folks!
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| 18:02 | polydaic | ...
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| 18:02 | polydaic | hi there!
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| 18:02 | polydaic | Bertl: ....
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| 18:03 | Bertl | hey
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| 18:10 | Bertl | polydaic: what's up, or just happy to see me? :)
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| 18:10 | polydaic | lol I'm the guy who emailed you
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| 18:10 | polydaic | last week
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| 18:10 | polydaic | about helping out with apertus
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| 18:10 | Bertl | that limits it to about 500 persons :)
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| 18:11 | Bertl | ah, helping out, that limits it further down to a dozen
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| 18:13 | polydaic | lol
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| 18:13 | polydaic | I'm the EE student?
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| 18:13 | polydaic | anyways
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| 18:13 | Bertl | excellent, so you want to help with the Beta design?
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| 18:13 | polydaic | David
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| 18:13 | polydaic | Yea!
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| 18:14 | Bertl | good, did you find the time to take a look the the Alpha SFE?
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| 18:14 | polydaic | on github?
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| 18:15 | polydaic | I've looked through it. Documentation is sparse though
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| 18:15 | polydaic | I saw you migrated to github from some other service recently
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| 18:15 | Bertl | did we?
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| 18:15 | Bertl | what documentation are you looking for?
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| 18:30 | polydaic | oh
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| 18:30 | polydaic | anyways
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| 18:30 | polydaic | What can I help with?
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| 18:31 | polydaic | I was seeing if there was any docs with your code on github
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| 18:31 | Bertl | depends on what you are willing/able to do
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| 18:31 | polydaic | I am willing to do many things lol
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| 18:31 | Bertl | the source code is basically the documentation, but I was more referring to the schematic and board layout for the SFE
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| 18:31 | polydaic | I'm sure you have things split into tasks? Do you use jira or asana?
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| 18:32 | Bertl | no project tracking yet
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| 18:32 | polydaic | okok
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| 18:33 | Bertl | so, hardware design or software?
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| 18:33 | Bertl | (what interests you more)
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| 18:33 | polydaic | I would love to work with hardware design, although I'm only 3rd year
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| 18:34 | Bertl | okay, comfortable with eagle/kicad?
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| 18:35 | polydaic | tbh I've heard of eagle but never used it
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| 18:35 | Bertl | so, what do you use for hardware design?
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| 18:38 | polydaic | I can probably use eagle
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| 18:39 | Bertl | okay, then maybe a good start is to create a few library elements we need?
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| 18:40 | polydaic | I've used MultiSim
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| 18:40 | polydaic | ok
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| 18:41 | polydaic | maybe a good idea to setup something like asana if you have 20 ppl helping?
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| 18:42 | Bertl | yeah, once we have more people helping, we'll certainly do something like that
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| 18:42 | polydaic | hmm I can also help write documentation and stuff too
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| 18:43 | Bertl | that would definitely be great
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| 18:43 | Bertl | so where would you like to start then?
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| 18:43 | polydaic | Yea. I would love to have the chance to contribute to hardware design, especially as all my jobs are like web development which don't even relate to EE
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| 18:44 | Bertl | okay, so, we are currently looking into several connectors for beta
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| 18:44 | polydaic | okok
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| 18:44 | polydaic | Like MIL grade?
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| 18:44 | Bertl | they are all similar, but of course have different land pattern
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| 18:44 | polydaic | land pattern?
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| 18:44 | Bertl | the footprint on the PCB
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| 18:45 | polydaic | okok
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| 18:45 | Bertl | i.e. the SMD pads and their placement to solder them on
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| 18:45 | polydaic | oh ok
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| 18:45 | Bertl | and of course, they have slightly different properties
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| 18:45 | polydaic | so like the connectors are the SMD pads?
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| 18:45 | Bertl | like pin spacing, shielding, etc
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| 18:45 | polydaic | ok
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| 18:46 | Bertl | let me give you an example
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| 18:46 | Bertl | DF23C-30DS-0.5V
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| 18:47 | Bertl | that is a connector from the hirose DF23C series
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| 18:47 | polydaic | oh i see
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| 18:47 | Bertl | if you google for that, you find a datasheet
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| 18:48 | polydaic | yep I found it
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| 18:48 | Bertl | on the 3rd page is a Recommended PCB Footprint
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| 18:49 | Bertl | similar for the other connector on the 4th page
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| 18:49 | polydaic | wait so are these interconnects make the chips removable?
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| 18:50 | polydaic | like the ones you get for the microprocessors?
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| 18:50 | Bertl | those are connectors between boards
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| 18:50 | polydaic | ohhhh
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| 18:50 | polydaic | sorry
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| 18:50 | Bertl | i.e. they allow to plug a board onto another board
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| 18:50 | polydaic | I see I see
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| 18:51 | Bertl | to actually use those connectors in our PCB design, those so called land pattern have to be created for a part library which can be used in e.g. eagle
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| 18:51 | polydaic | ok
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| 18:51 | Bertl | this is rather simple, but still it needs to be done with some care
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| 18:51 | Bertl | i.e. get the placement right, the number of pins, find a design symbol, etc
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| 18:52 | polydaic | so just cad the schematic?
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| 18:52 | Bertl | schematic and the layout part i.e. the footprint
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| 18:53 | Bertl | there is an eagle tutorial for doing that and eagle is available for free for Linux/Mac/Win (in a limited version)
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| 18:54 | polydaic | https://imgur.com/ORQm0EQ
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| 18:54 | polydaic | you mean copy this?
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| 18:56 | Bertl | nah, we don't need the 3D/Cad version, we need the schematic/PCB version
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| 18:57 | polydaic | ohkk
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| 18:57 | Bertl | something like this: http://mightyohm.com/blog/wp-content/uploads/2008/12/ipc-lp-calc.png
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| 18:57 | polydaic | yea i understand
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| 18:57 | polydaic | so I need to make it for that specific connector?
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| 18:57 | polydaic | DF23C-30DS-0.5V
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| 18:57 | Bertl | or find it somewhere on the net
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| 18:58 | Bertl | it always pays off to do a quick search first
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| 18:58 | Bertl | often components have been already created and you only need to adjust minor details if anything at all
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| 18:58 | polydaic | yep
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| 18:58 | polydaic | but for that specific connector correct?
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| 18:59 | Bertl | yes, that would be one we are considering
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| 19:00 | Bertl | we are also considering the 40pin version from the same series
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| 19:01 | polydaic | ok
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| 19:01 | polydaic | Ok. Do you have a google doc of all the tasks needed to be done or just ask on IRC?
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| 19:03 | Bertl | for now, just ask here or via email
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| 19:04 | polydaic | ok
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| 19:30 | polydaic | wait the pcb footprint has different dimensions than the prat
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| 19:30 | polydaic | I assume I should use the reccomended pcb footprint one as its a landing pad?
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| 19:35 | Bertl | hmm?
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| 19:38 | polydaic | land pattern is slightly larger than the actual device correct?
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| 19:41 | Bertl | yes, that's correct, i.e. the pads are somewhat larger
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| 19:41 | Bertl | because the solder has to go around the pins
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| 19:41 | Bertl | but the spacing between pads and pins has to be identical
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| 19:54 | polydaic | ok
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| 19:54 | polydaic | do you need pin numbers
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| 19:54 | polydaic | and i assume top and side view like in that example you linked?
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| 19:55 | Bertl | on the PCB we want some kind of orientation marker, i.e. usually pin 1 with a dot, on the schematic we want pin numbers
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| 19:57 | Bertl | best to pick an existing connector from the default eagle library and see how it is done there
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| 23:13 | Bertl | off to bed now ... have a good one everyone!
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