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| 05:08 | Bertl | off to bed now ...
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| 07:44 | supragya | RexOrCine, available? need review!
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| 12:45 | Bertl | good morning folks!
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| 12:45 | supragya | hi Bertl
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| 12:46 | supragya | Do we have any special place to upload images for Wiki?
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| 12:48 | Bertl | depends on the images (size, type)
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| 12:48 | Bertl | illustrations probably can go directly into the wiki (preferably as SVG)
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| 12:48 | supragya | I found it... thanks
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| 12:49 | Bertl | for larger files like snapshots or movie sequences there is a fileserver
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| 13:00 | supragya | page edited: https://wiki.apertus.org/index.php/RAW12
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| 13:04 | Bertl | good
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| 13:07 | supragya | last night hassles link: https://wiki.apertus.org/index.php/RAW12#Understanding_the_RAW12_file_format
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| 13:09 | Bertl | minor nitpick: the sensel does not 'have' 12 bits, the sensel is analog, the ADC in the sensor converts it to 8-14bit depending on sensor and configuration, but the image pipeline in the FPGA produces 12bit values
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| 13:12 | supragya | is it okay now?
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| 13:14 | Bertl | looks good, there is another twist though, the sensor can mirror the image vertically
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| 13:14 | Bertl | (the sensor being cmv12k)
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| 13:15 | Bertl | in this case, the bayer pattern is mirrored too
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| 13:15 | Bertl | i.e. the first line then starts with GBGBGB... and the odd lines are RGRGRG...
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| 13:16 | supragya | you mean something like BOTTOM_UP_DIP?
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| 13:16 | supragya | *DIB?
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| 13:17 | supragya | or just pattern change from RGGB to GBRG
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| 13:17 | Bertl | the sensor simply reverses the order how the image is read out
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| 13:17 | supragya | so last byte is the logical first byte?
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| 13:17 | Bertl | so you get the last line first, then the previous to last, and so on till you reach the first row
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| 13:17 | supragya | so rows are reaarranged... but each row is intact?
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| 13:18 | Bertl | yup
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| 13:18 | supragya | will add them in a moment :)
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| 13:22 | supragya | done. Looks good now?
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| 13:24 | Bertl | s/inverted/flipped/ or s/inverted/mirrored/
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| 13:24 | Bertl | invert usually means reversing the color
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| 13:25 | supragya | done
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| 13:26 | Bertl | yep
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| 13:31 | [simon] | a vertically mirrored image doesn't mean that the columns are reaarranged?
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| 13:34 | Bertl | correct
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| 13:56 | Bertl | welcome rahul!
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| 14:01 | [simon] | I'm sorry I meant that if the image is vertically mirrored than the colums must be flipped, like RGRGRGRG -> GRGRGRGR or I'm wrong?
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| 14:02 | Bertl | the first row will start with RGRGRG... the second one follow with GBGBGB... no change in the order
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| 14:02 | Bertl | I mean GBGBGB.. then RGRGRG... sorry
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| 14:07 | [simon] | but isn't this orizzontally mirrored?
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| 14:08 | Bertl | correct
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| 14:08 | Bertl | horizontal mirroring is available too, but that needs support on the image pipeline side
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| 14:10 | RexOrCine | supragya: Highlight the bits you want me to check.
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| 14:11 | supragya | hi [simon], it is quite common to have vertical mirroring. Not sure about horizonatal mirroring though. It is so common that some formats allow frame to be stored bottoms up. See: https://msdn.microsoft.com/en-us/library/windows/desktop/dd407212(v=vs.85).aspx
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| 14:11 | supragya | hi RexOrCine !
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| 14:11 | RexOrCine | Hey.
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| 14:15 | [simon] | thanks for the clarifications :)
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| 14:30 | Bertl | np
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| 15:03 | rahul | Hello I am Rahul Vyas, Computer Engineering MSc student from TU Delft, Netherlands.
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| 15:03 | Bertl | hey, how's it going?
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| 15:04 | rahul | Although I've started late, but I have worked on the similar topic at TU Delft.
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| 15:05 | Bertl | similar topic being?
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| 15:07 | rahul | I have designed the real time video processing engine using PYNQ board (ZYNQ based), and have used Vivado HLS tools to deploy the kernel on the FPGA fabric for displaying the edges with red color.
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| 15:08 | Bertl | nice, so you're comfortable with HDL and FPGAs in general
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| 15:12 | rahul | Yes, so I am doing my minors in Reconfigurable computing, I have earlier worked on designing FPGA (mainly coded in VHDL) based communication platforms for Avionics/ IOT applications. my publication link (http://ieeexplore.ieee.org/document/7889931/) .
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| 15:12 | Bertl | sounds good to me ...
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| 15:12 | Bertl | check out https://wiki.apertus.org/index.php/GSoC_Overview if not done so already
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| 15:13 | Bertl | also pick your task(s), we have a number of interesting HDL related ones
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| 15:13 | Bertl | make sure to complete the challenge task(s) and do some nice proposal(s)
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| 15:14 | Bertl | you can ask here anytime for input and/or reviews on both the challenges and the proposals
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| 15:14 | Bertl | (GSoC applicants as well as mentors are happy to help)
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| 15:15 | supragya | finally Bertl is getting some HDL applicants XD. :)
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| 15:15 | rahul | Thank you for the support.
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| 15:15 | BAndiT1983|away | changed nick to: BAndiT1983
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| 15:16 | BAndiT1983 | hi supragya
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| 15:16 | supragya | hi BAndiT1983 *waving hands*
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| 15:16 | BAndiT1983 | read logs from yesterday and have to say that NLE is not the scope of OC
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| 15:16 | supragya | looked like it
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| 15:17 | BAndiT1983 | OC can be used as data provider and as tool for first color grading, but other apps are more suitable and have more developers
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| 15:17 | supragya | that NLE thing felt quite tangential to me.
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| 17:10 | RexOrCine | "What a phenomenal project! In general I'm very keen to watch open source hardware find its way into more and more applications, but I never expected such a specialised, sophisticated one. Huge props to the team, and I wish all the best for the project!"
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| 17:33 | Bertl | RexOrCine: what project? :)
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| 17:33 | RexOrCine | AXIOM.
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| 17:34 | supragya | who said?
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| 17:35 | RexOrCine | Just a guy who subscribed to our pre-note lists, namely Re ABEX.
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| 17:40 | Bertl | off to shovel some snow .. bbl
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| 18:50 | RexOrCine | Is it deep?
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| 19:00 | Bertl_oO | about 5-6cm, not very much ...
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| 19:02 | supragya | never seen snow after the age 8! and that too only once - life at tropics :)
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| 19:30 | Kjetil | You're missing out :)
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| 19:30 | supragya | I know :)
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| 21:18 | TofuLynx | Hello!
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| 21:18 | TofuLynx | Just had a mini course today related to photography directing, it was great
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| 21:19 | TofuLynx | btw BAndiT1983, I haven't got that bug in OC Downscaler fixed
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| 21:19 | TofuLynx | I have debugged it to some extent
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| 21:21 | TofuLynx | so far I have determined that the bug is only visible in the green and blue channels, which coincidentally are in the odd rows. (when I removed the green2 from the extractor, the bug disappeared from the green channel)
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| 21:22 | TofuLynx | I will have to research this further
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