Current Server Time: 19:44 (Central Europe)

#apertus IRC Channel Logs

2016/03/18

Timezone: UTC


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RexOr2
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Bertl_zZ
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07:22
mithro
Bertl_oO: Where can I find more information about the VCC / VCCIO pins on the AXIOM header?
07:26
mithro
chooksprod / se6astian|away: There is actually a "standard" for locking HDMI connectors
07:40
mithro
Bertl_oO: and where do you keep your Eagle components?
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se6astian|away
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09:19
se6astian
mithro: please share the standard for HDMI locking
09:19
Bertl_oO
mithro: VCCIO and VCC is variable on the Beta
09:20
mithro
what does "variable" mean? - I need to know what i should be suppling there from the Opsis board
09:20
Bertl_oO
but you can assume (for now) that VCC is 3V3 and VCCIO is 1.8-2.5V (reference for LVDS)
09:21
Bertl_oO
so I'd say if you use 3V3 and 2V5 you should be fine
09:21
Bertl_oO
(if 1V8 is easier for you than 2V5, that's fine as well)
09:21
mithro
se6astian: I don't know where it is defined - It looks like this -> http://www.digikey.com/product-detail/en/amphenol-fci/10029449-002TLF/609-1011-ND/1001326
09:22
mithro
The "older" standard looked like this -> http://media.digikey.com/Photos/Molex/0483077022.JPG
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RexOr|adrift
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pusle
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10:23
mithro
Hrm, 2V5 is actually reasonably hard
10:25
mithro
On the Spartan 6 we can do LVDS compatible with 2V5 levels using a VCCIO of 3V3
10:29
mithro
Bertl_oO: do you have a pdf version of the pcb layout for the axiom beta board which has the PCI-E connectors on it?
10:30
mithro
Bertl_oO: this is the current one, right? http://vserver.13thfloor.at/Stuff/AXIOM/BETA/axiom_beta_board_100_v0.16_test.brd
10:31
mithro
oh, are the south and north LVDS length matched?
10:32
mithro
(to each other)
10:38
parasew
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10:39
Bertl_oO
within the pairs yes, between the pairs no
10:39
Bertl_oO
but they are very similar in length
11:11
mithro
Well, this board only seems to need about 4 vias
11:13
mithro
Well, since its 10pm, I think I'm going to call that a day for tonight
11:25
Bertl_oO
nn
11:32
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tezburma
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12:46
RexOr2
Time is just a figment of your imagination Bertl_oO
12:48
RexOr2
mithro *
12:49
RexOr2
(just waking up here)
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kaiserlich
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14:40
davidak
se6astian: could you update the AXIOM Beta Development Status at least once a month? it is again 2 months outdated. if nothing changes just update the date so one knows that the information is up2date.
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14:51
se6astian
davidak: thanks for the reminder
14:51
se6astian
will do it now
14:51
davidak
thank you!
15:33
se6astian
updated
16:21
se6astian
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tyrone
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16:40
tyrone
hi all.
16:40
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16:40
tyrone
how was the EU meetup?
16:48
intracube|away
the image from the newest TT video is clipping a bit on the face: https://twitter.com/ApertusOSCinema/status/707552639567990784
16:49
intracube|away
knows it's probably not the final grade
16:49
intracube|away
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16:49
intracube
pulled back a bit on the right: http://i.imgur.com/cMy1XR0.jpg
16:52
intracube
there's a greenish tint to the left side. lighting I guess?
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se6astian|away
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RexOr2
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Bertl_oO
off for a nap ... bbl
19:25
Bertl_oO
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se6astian
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se6astian|away
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se6astian
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23:32
mithro
http://google-opensource.blogspot.com.au/2016/03/something-different-code-up-hardware-in.html?m=1
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