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#apertus IRC Channel Logs

2021/01/18

Timezone: UTC


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Bertl_oO
off to bed now ... have a good one everyone!
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Bertl_oO
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se6ast1an
good day
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Bertl_zZ
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12:13
Bertl
morning folks!
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15:54
grimler32
any al1ens or t1me travelers here?
15:57
Shohei
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16:01
se6ast1an
grimler32: we might never know!
16:03
grimler32
if there are any please pm me I need your help
16:04
se6ast1an
save or destroy planet?
16:07
grimler32
save!
16:21
se6ast1an
very good
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17:00
se6ast1an
MEETING TIME!
17:00
se6ast1an
who is here?
17:00
se6ast1an
and ready to report?
17:00
Bertl
is here ...
17:00
metal_dent[m]
is present
17:00
bluez
is here
17:00
BAndiT1983
changed nick to: BAndiT1983|away
17:01
eppisai
is here!
17:01
se6ast1an
sounds good
17:01
se6ast1an
lets do the usual order :)
17:01
se6ast1an
metal_dent[m]: would you be so kind to start
17:01
metal_dent[m]
sure!
17:02
osqar
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17:02
metal_dent[m]
last week after the contrast shader on the visualizer display was added, i created a toggle button
17:02
osqar
Hi all
17:02
Shohei
Hi!
17:02
metal_dent[m]
the contrast layer can be turned on and off using that button
17:03
metal_dent[m]
then we decided to move towards the hardware tasks, so i tested my USB code using the virtual serial ports which worked as expected
17:04
metal_dent[m]
then to test on the real remote i asked Bertl to reattach the remote on the remote setup and tested there but as that one is newer version so it has some problems with UART
17:05
Bertl
did BAndiT1983 get the USB working on the new remote?
17:05
metal_dent[m]
along with BAndiT1983|away i am trying to debug the problem
17:05
metal_dent[m]
> did BAndiT1983 get the USB working on the new remote?
17:05
metal_dent[m]
not yet, we are trying to narrow down the problem
17:06
metal_dent[m]
that's it from me!
17:06
Bertl
I see, the serial adapter should be available tomorrow
17:06
Bertl
(JFYI)
17:06
metal_dent[m]
great!
17:09
bluez
i'll continue with my report then..
17:09
se6ast1an
many thanks metal_dent[m]! do you have any screenshots or images so we can see the progress?
17:09
se6ast1an
yes bluez please start in the meantime
17:10
eppisai
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17:10
bluez
okay! so last week i did more reading on PCAP/ICAP interfaces on the Zynq, and also revised on the frame/CLB structures etc.
17:10
eppisai
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17:11
metal_dent[m]
yes here is the simulation -> https://lab.apertus.org/F170410
17:11
bluez
i'm trying to write a python script to read back the bistream from PL... by directly accessing PCAP interface
17:12
bluez
but it seems the PCAP can be used only through the 'devcfg' interface by Xilinx
17:12
bluez
which has its own gotchas
17:12
bluez
so i have been trying to make it work.. not quite working yet
17:13
bluez
thats it from me!
17:13
vup2
is here
17:14
se6ast1an
many thanks bluez!
17:14
se6ast1an
eppisai: ready for your turn?
17:14
eppisai
yeh.
17:15
eppisai
last week, I chnaged the underlying approch of keyboard to suit better for capital, small, other cases and was using using string instead of array of char
17:16
eppisai
https://user-images.githubusercontent.com/54789531/104855284-db277d80-5931-11eb-8e0b-62ce806d6ac4.mp4
17:16
Bertl
isn't a string an array of characters?
17:17
eppisai
yes, but as i was using string stl (c++11)
17:17
eppisai
it is also array of char with null character
17:18
eppisai
but it is not well suited for pic32, i think.. so using an array of char now..
17:18
se6ast1an
sounds good, what are the next steps or plans?
17:19
eppisai
i am adding pointer now, and now user can select the key through knob
17:19
eppisai
but my network is unstable
17:19
eppisai
so will upload screenshot as soon as i get bandwidth
17:20
eppisai
also made the proper qwerty keyboard
17:20
eppisai
rows starting with Q,A,Z..
17:20
Bertl
nice
17:21
se6ast1an
great!
17:21
eppisai
one thing, that i had noticed an hour ago
17:22
anuejn
is here
17:22
eppisai
their is no spacebar in keyboard rightnow
17:22
eppisai
would that be needed?
17:22
Bertl
good point
17:23
eppisai
i think, my network is again ghosting me.. let me open irc log.. and will get back..
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eppisai
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eppisai
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17:25
se6ast1an
good question, spacebar could be useful I think
17:25
eppisai
https://drive.google.com/file/d/15CL662uREGdgkI39MYhJvInQB7q-Y4su/view?usp=sharing
17:26
se6ast1an
but a detail we can also add/discuss later I assume
17:26
eppisai
ohk! :)
17:26
se6ast1an
looks good
17:26
se6ast1an
anything else?
17:27
eppisai
ahh.. no thats it..
17:28
se6ast1an
great, many thanks
17:28
se6ast1an
Shohei: please go ahead with your report!
17:28
Shohei
Thank you :)
17:29
Shohei
I finished reading the link about the enclosure, roughly checked the relate linkes, and also
17:29
Shohei
one of UI/UX (since it was discussed last week).
17:29
Shohei
I'm coisidering to read links about PCBs listed here next since I want to get one sample in my hand.
17:29
Shohei
If it's too difficult to DIY myself, I will buy the DIY kit, which is a bit expensive for me :)
17:29
Shohei
https://wiki.apertus.org/index.php/AXIOM_Beta/PCBs
17:29
Shohei
If there are anything I should read ealier, I'm glad if you could tell me :)
17:29
Shohei
I am studying the structure of cameras of other existing models, too.
17:29
Shohei
That's all :)
17:31
Bertl
if you plan to assemble the PCBs yourself (i.e. 'build' the boards) please contact me for a preliminary check whether you have the right tools/skills there
17:31
se6ast1an
great, many thanks - did you create an onshape account and open the enclosure model there?
17:32
Shohei
Thank you verymuch Bertl. I will contact you then :)
17:32
Shohei
se6ast1an, not yet. I willl make it. Thank you!
17:33
Shohei
ups,
17:33
se6ast1an
good!
17:33
se6ast1an
let me know if you need any support in the process
17:33
se6ast1an
vup2: what news do you bring us? :)
17:33
Shohei
Thank you again:)
17:33
vup2
well, anuejn and I worked more on the wavelet compression again
17:34
vup2
Besides brainstorming ideas on how to improve the compression ratio with anuejn I worked on getting the rust implementation further along
17:35
vup2
testing ideas with the python implementation is getting quite slow and we will need a rust implementation anyways for the recorder
17:35
vup2
so the rust implementation can now do the basic steps, recursive 2d wavelet transformation, quantization, runlength encoding and huffman encoding
17:36
vup2
only the inverse of the quantization and wavelet steps is currently implemented, but undoing huffman encoding and runlength encoding is not that hard and will follow soon
17:37
vup2
the rust implementation can also now open 12 bit DNG files so it can read the demo real world files anuejn choose to test the compression
17:38
se6ast1an
cool, what ideas/directions do you want to try to improve the compression?
17:38
vup2
the next steps will be implementing the gateware optimized packing / unpacking of the compressed data in the rust implementation and then hopefully switching our experiments over to rust
17:38
vup2
se6ast1an: I think anuejn want to talk about them
17:38
se6ast1an
right
17:39
vup2
so yeah thats It from me
17:39
se6ast1an
some time in the last week we had the discussion if it wouldnt be beneficial to maintain the cineform raw standard compatibility so any software that supports it can read our files, I did some research then and discovered that the broad support for cineform raw in editing software has gone to 0 since gopro purchased it and killed it
17:39
vup2
right
17:39
se6ast1an
there is no software support anymore, not even gopro itself seems to support it anymore
17:40
se6ast1an
so any direction we diverge from the standard is as good as the standard itself :)
17:40
se6ast1an
anuejn: please go ahead
17:40
anuejn
For the wavelet compression I mainly tested two things:
17:40
anuejn
1. Limiting the huffman codebook size and defining an 'escape symbol' after which a non-compressed symbol can follow. This is essentialy equivalent to generating a non-optimal huffman table.
17:41
anuejn
This allows us to reduce the hardware usage in the FPGA (save BRAMs). The tests showed that limiting huffman codebook size to a moderate size (1024 symbols) has a negligeble hit in compressed size.
17:41
anuejn
2. Combining multiple frequent symbols into additional symbols
17:42
anuejn
Experiments there showed that combining two characters of (-1, 0, 1) brings slightly better compression
17:43
anuejn
combining more than two characters brought virtually no benefit as any savings in symbol count were outwight by losses in the huffman stage
17:43
anuejn
I also experimented with some predictor based thing but that led nowhere unfortunately
17:44
se6ast1an
has the JPEG XL documentation brought any new ideas?
17:44
anuejn
Still on the list of things to try is nonlinear coding of symbols (which is a thing cineform does)
17:44
anuejn
se6ast1an: not really
17:44
se6ast1an
right
17:44
anuejn
But I didnt try too hard
17:45
anuejn
after all it is a completely different compression scheme
17:45
Bertl
how large is the window currently required for encoding?
17:45
Bertl
i.e. how many 'lines' of raw data need to be buffered?
17:46
vup2
Bertl: for the basic algorithm about 6 rows
17:46
Bertl
that is quite manageable ...
17:46
anuejn
but then we need some buffers in addition in some places
17:46
vup2
yep
17:47
vup2
we have been paying close attention to the required buffer size to have it work well / efficiently on a fpga
17:48
vup2
the way the final compressed image is packed is optimized to bring a low required buffer size while not loosing too much compression
17:48
anuejn
the other thing I looked into is building the micro r2.1
17:49
anuejn
I am currently cleaning up the schematics of the r2 and fixing up things that went wrong
17:49
se6ast1an
a great!
17:49
se6ast1an
*ah
17:49
anuejn
I guess in a few days I would be ready to start on routing the PCB
17:49
anuejn
but before that we need to finalize the mechanical concept
17:50
anuejn
so that is something we have to discuss
17:50
se6ast1an
I am happy to
17:50
se6ast1an
Bertl: your feedback regarding R2.1 was mostly routing related right? not schematic?
17:51
se6ast1an
trace length matching...
17:51
Bertl
I really can't remember ...
17:51
anuejn
maybe we should sit together sometime later and have a videochat session about that se6ast1an vup2?
17:51
se6ast1an
sure!
17:51
se6ast1an
and anuejn can you export schematic PDF once that is done for Bertl to take a look, maybe that helps to remember
17:52
anuejn
Bertl: then maybe it is best if I send you the schematic when I am done and you review it then?
17:52
Bertl
yep, sure
17:52
anuejn
fine :)
17:52
se6ast1an
very good
17:52
anuejn
thats it from my side
17:52
se6ast1an
many thanks!
17:53
se6ast1an
quick updates from me:
17:53
se6ast1an
I adapted the design of the prototype/test OLPF holder 3d print part
17:53
se6ast1an
so there are now different adapters that place the filter at different distances to the sensor
17:53
se6ast1an
in 2mm steps
17:54
se6ast1an
I will print those soon and when I have a beta in hands again can start capturing new samples again for intrac and others
17:54
se6ast1an
nextpcb has notified us today that the PCBs have been produced and shipped
17:54
se6ast1an
should arrive on Thursday
17:54
se6ast1an
DHL already forced me to pay import duties
17:55
se6ast1an
beside various small AXIOM Remote software additions here and there
17:55
se6ast1an
I mainly worked on Bill of Materials (BOM) related research for the upcoming production run
17:55
se6ast1an
all parts have now been researched and I started ordering already today
17:56
se6ast1an
as the parts need to go to belgium first its a bit complicated
17:56
se6ast1an
will order the remaining distributors today or tomorrow at the latest I hope
17:57
se6ast1an
thats it from me
17:57
se6ast1an
Bertl: the finisher!
17:57
Bertl
tx
17:57
Bertl
well, I finally got to testing the connector replacement for the PM-MB interface
17:58
Bertl
we originally went for the hiroes DF12 series there but the connectors caused many problems during soldering and rework
17:59
Bertl
first they do not handle heat well, so hot-air rework is 'complicated'
17:59
Bertl
then they always had a bunch of shorts because of the 0.5mm pitch which were hard so see and non-trivial to remove
18:01
Bertl
so we decided to replace them but only after a verification
18:01
Bertl
luckily we found an FCI product which looks very similar (same pitch, same size, even same footprint)
18:01
Bertl
but doesn't seem to have those drawbacks
18:03
Bertl
I originally planned to test them on the one AXIOM Beta DevKit we still have around, but I decided against that and reworked one of the newer main boards for testing
18:04
Bertl
mechanically everything looks great, electrical testing happend in the last hour and seems to work fine, although I seem to have some weird power leak on the MB, but that is likely unrelated to the connectors
18:05
Bertl
so in my opinion, the new conenctors are well suited for the task, but only time will tell
18:05
Bertl
I also installed the remote remote, although we are still missing the serial interface there
18:06
Bertl
and helped here and there with various stuff ...
18:06
Bertl
that's it from my side for this week
18:06
anuejn
thanks :)
18:06
anuejn
what do you mean by "power leak"?
18:07
Bertl
well, when I power up the test stack (MicroZed, MainBoard, PowerBoard) I have a yet unexpected 100mA current draw ...
18:07
Bertl
s/unexpected/unexplained/
18:08
anuejn
ah ok
18:08
Bertl
it definitely originates from the main board
18:08
Bertl
but I have no clue what could consume 100mA (not more and not less) there
18:08
se6ast1an
thanks for the report
18:08
se6ast1an
any news from the SATA plugin module front?
18:08
Bertl
nothing there yet
18:09
se6ast1an
right
18:09
se6ast1an
anyone else who wants to share/report something
18:09
se6ast1an
or ask questions? :)
18:11
se6ast1an
ok then, thanks everyone for the meeting, great as always!
18:11
se6ast1an
MEETING CONCLUDED
18:12
Bertl
thanks for moderating!
18:12
osqar
Bye!
18:13
Bertl
osqar: that should be 'BUY!' :)
18:14
osqar
Buy buy! :D
18:15
Shohei
left the channel
18:16
se6ast1an
yes BOM BUY :D
18:17
se6ast1an
heading off
18:17
se6ast1an
supermarket closed already I just noticed
18:17
se6ast1an
but maybe the online opening hours are not correct...
18:18
osqar
Ai! Curfew
18:18
osqar
See you guys
18:18
se6ast1an
yes, hard! lockdown
18:18
se6ast1an
see you
18:18
osqar
left the channel
18:35
BAndiT1983|away
changed nick to: BAndiT1983
19:08
Bertl
okay, just for the record, 100mA problem solved, it was a short on one of the SPI supplies on the MB
20:21
eppisai
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eppisai
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20:58
se6ast1an
Bertl: great
21:18
anuejn
se6ast1an, vup2 when do you have time to discuss mechanical stuff?
21:20
vup2
anuejn: now would work form me
21:23
anuejn
for me too
21:58
se6ast1an
sorry, very busy currently
21:58
se6ast1an
tomorrow afternoon is lighter again for me
21:59
se6ast1an
off now
21:59
vup2
ok, tomorrow evening will probably work better for me
22:29
eppisai
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eppisai
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22:46
vup2
Bertl: with the current beta mainboard, are the clock capable pins among the lvds lanes of the plugin modules?
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intrac
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intrac_
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23:06
mumptai
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23:25
vup2
(11:00 to 14:00 and after ~20:00 should work for me tomorrow)
23:25
anuejn
anytime should work for me
23:41
BAndiT1983
changed nick to: BAndiT1983|away