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#apertus IRC Channel Logs

2014/11/17

Timezone: UTC


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01:29
Bertl
off to bed now ... have a good one everyone!
01:29
Bertl
changed nick to: Bertl_zZ
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se6astian|away
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comradekingu
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derWalter
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se6astian
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intracube
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11:34
Bertl_zZ
changed nick to: Bertl
11:34
Bertl
morning folks!
11:55
davidak
good morning Bertl
11:56
Bertl
hey davidak! how's going?
11:57
davidak
good and you?
11:58
Bertl
fine, thanks! I'm almost finished with the first set of Beta boards for testing, i.e. the Sensor Board, a dummy Interface Board and a Test Beta Board
11:58
Bertl
will be up for review shortly
11:59
davidak
great :)
12:01
Bertl
what's up on your end?
12:02
davidak
i'm at work. migrating servers to paravirtualization on our xen-servers ;)
12:02
Bertl
windows machines I presume?
12:02
davidak
no, ubuntu server
12:03
Bertl
why xen then?
12:03
davidak
because it's mature
12:03
davidak
i have not decided it
12:04
davidak
i would use KVM :D
12:04
Bertl
well, kvm is solid, but I still wouldn't use kvm either
12:04
davidak
maybe we switch in the next years
12:04
davidak
what else?
12:04
Bertl
by using a full virtualization technology like kvm/xen, you lose a lot of performance because you have to virtualize the entire kernel
12:05
davidak
yes
12:05
Bertl
using isolation technologies is much more efficient
12:05
Bertl
I've been using Linux-VServer for more than 15 years now to do that
12:06
Bertl
recently mainline LXC steps up to do similar
12:07
Bertl
nah, I lied, only 14 years :)
12:07
davidak
:D
12:07
davidak
long enough
12:08
Bertl
basically a container solution allows you to run separated guest environment on the same kernel
12:08
Bertl
which gives you a lot less overhead, way better performance and scalability and less stuff to maintain
12:10
davidak
we have 8 hypervisors and about 150 VMs. also different versions of ubuntu (8.04, 10.04, 12.04, 14.04) some IPFires abs 1-2 windows servers
12:11
davidak
we use XenCenter to manage them
12:12
davidak
live migration is important
12:12
Bertl
for maintainance purposes?
12:12
davidak
yes
12:12
davidak
update a hypervisor
12:13
Bertl
you can have your cake and eat it, just put the container system in a single xen environment
12:14
Bertl
you can then easily migrate all the containers for maintenance and still have 100 guest systems on a single machine
12:16
Bertl
anyway, not my business, just saying ...
12:21
philippej
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12:21
Bertl
wb philippej!
12:21
philippej
Hello !
12:22
philippej
how goes?
12:22
Bertl
great! almost done with the first Beta set
12:22
Bertl
(design for sensor, interface and test board)
12:25
philippej
cool !
12:26
philippej
pcb already ordered?
12:32
Bertl
no, design almost finished
12:32
Bertl
I'll put it up for review today, and if we don't spot any issues, we'll order tomorrow
12:34
davidak
are there people who can review it?
12:34
Bertl
yes, I'd say so
12:35
davidak
good
12:38
mars_
and we will! :)
12:40
philippej
The apertus soldiers slowly wake up from their cave
12:41
mars_
and it's my first day in 2 weeks where i have the time to do something for apertus...
12:42
philippej
Perfect timing, soldier ! :-)
12:50
Bertl
we are not at war here ...
12:50
philippej
I guess I drunk to much cofee
13:15
philippej
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intracube
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jucar
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philippej
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14:46
Bertl
okay, here we go ...
14:47
Bertl
http://vserver.13thfloor.at/Stuff/AXIOM/BETA/axiom_beta_board_100_v0.7_test.pdf
14:47
Bertl
http://vserver.13thfloor.at/Stuff/AXIOM/BETA/axiom_beta_interface_dummy_v0.7.pdf
14:47
Bertl
http://vserver.13thfloor.at/Stuff/AXIOM/BETA/axiom_beta_sensor_cmv12000_v0.12.pdf
14:47
Bertl
http://vserver.13thfloor.at/Stuff/AXIOM/BETA/axiom_beta_sensor_cmv12000_v0.12_zif.pdf
14:49
Bertl
Eagle schematic and board files are at the same location, same basename
14:49
Bertl
the dummy interface board is not smoothed yet, but all connections are there
14:50
Bertl
I'll also do some layer images for each of them
14:50
Bertl
(but first something to eat :)
14:50
davidak
you are also eating late? :d
14:51
Bertl
especially important is that all connections are properly routed through all three boards, so please double and triple check that
14:51
davidak
i had just lunch
14:53
Bertl
I basically eat when I'm hungry and I've got some time
14:55
davidak
yes, me too
15:31
philippej
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15:33
se6astian|away
changed nick to: se6astian
15:36
Bertl
evening se6astian!
15:36
se6astian
good evening
15:37
se6astian
the ergonomics are coming!
15:37
jucar
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15:41
se6astian
we are holding our local ergonomics work group meeting in 80 minutes
15:48
Bertl
please discuss if we should have beveled or round corners on the sensor/interface PCBs
16:15
troy_s
se6astian: Explain?
16:16
troy_s
Bertl: How many peeps in here can discuss that low level stuffs out of curiosity? danieel for certain. Who else?
16:17
Bertl
mars_ for example and we also got a bunch of electrical engineering folks, who should be able to do that as well
16:17
Bertl
but certain things can even be checked by somebody who knows almost nothing about those things
16:17
Bertl
(for example, continuity across the boards)
16:35
designbybeck
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Bertl
wb designbybeck!
16:36
designbybeck
greetings
16:39
Bertl
so what did "beck" design recently?
16:42
se6astian
beveled our round corners on the sensor PCB, how is it relevant? :)
16:42
Bertl
for ergonomics?
16:42
se6astian
yes
16:43
se6astian
troy_s: quite simple: a bunch of team members meet in person and discuss designs/models/ideas/concepts
16:43
Bertl
well, might simplify attaching the case or prevent scratches or just look more stylish?
16:43
se6astian
we meet every week and everybody gets certain tasks/areas of work assigned
16:43
se6astian
I see :)
16:43
se6astian
well then we will of course discuss it :)
16:44
Bertl
excellent! that way my work doesn't seem so unimportant :)
16:45
se6astian
we will likely more intensively discuss this idea to extend the shields to the bottom and place connectors there
16:46
Bertl
excellent as well!
16:46
troy_s
se6astian: Who all ends up going?
16:47
se6astian
so far 5 people are expected today: 2 dops, one precision engineer and one industrial designer plus me
16:48
davidak
are all from apertus or is it a general meeting?
16:51
troy_s
se6astian: I'd suggest that getting a 1st AD or two is more important on that front than a DoP. (Yes, I just said that.)
16:51
troy_s
se6astian: Experienced 1st AC
16:51
troy_s
(not AD. mistyped)
16:51
troy_s
(derp)
16:52
Bertl
I guess you can send/bring one :)
16:52
troy_s
No I can't.
16:52
se6astian
if you know any 1st AC in Vienna who would be interested in participanting next week let me know
16:52
troy_s
I wish I did.
16:52
troy_s
UK maybe, but not Vienna.
16:52
Bertl
I'm disappointed! :)
16:53
troy_s
Isn't Vienna next to Moscow?
16:53
se6astian
davidak: its about the AXIOM so all people participating are automatically from apertus° :)
16:53
Bertl
troy_s: not relaly
16:53
Bertl
*really
16:53
se6astian
yes moscow is just around the corner :)
16:53
troy_s
All joking aside, an AC will have the eyes to spot glaring omissions or details that many eyes may not.
16:54
troy_s
Bertl: Right. I meant Shanghai.
16:55
troy_s
se6astian: Are there updated wireframes or renders available?
16:56
se6astian
https://wiki.apertus.org/index.php?title=AXIOM_Beta#AXIOM_Beta_PCB_Stack_Concept
16:58
troy_s
Gah. All boards still? Sorry. I'm a dimwit. I (erroneously) assumed it was heading to housing discussions.
16:58
troy_s
is a complete idiot.
16:58
troy_s
Apologies.
16:59
troy_s
Bertl: What does the 4x4 matrix bring to the table? Offsets?
16:59
Bertl
in the Alpha design?
16:59
troy_s
Bertl: Yes.
16:59
Bertl
we basically handled the bayer channels there
17:00
Bertl
i.e RG/GB
17:00
troy_s
In a 4x4 matrix???
17:00
Bertl
yup
17:00
troy_s
How the hell.
17:00
Bertl
ah, that's rather simple math :)
17:00
troy_s
A LERP obviously?
17:01
troy_s
Can you link me to a bit of example?
17:01
troy_s
Very interested in that.
17:01
troy_s
(Probably obvious stuff, but I had no clue.)
17:01
Bertl
math, code or fpga implementation?
17:02
troy_s
I'd hope that the 3D LUT makes a landing at the beginning. No way to really profile a sensor well without it.
17:02
troy_s
Math?
17:02
troy_s
Or code.
17:02
troy_s
Bertl: Am I correct in assuming that the byproduct of a 4x4 matrix debayer is lerp?
17:03
Bertl
https://wiki.apertus.org/index.php?title=Axiom_Alpha_Software
17:03
Bertl
can be, doesn't need to be
17:04
troy_s
Oh. Head explosion.
17:04
troy_s
So you could bury a cubic in a 4x4 matrix?
17:05
Bertl
no, only linear relations between the channels, no quadratic or cubic interpolations
17:05
Bertl
it was more a simplification from the fpga side than a 'feature' actually
17:06
Bertl
the 3x3->4x4 extension is right above the LUTs section
17:06
troy_s
So how exactly does a 4x4 matrix debayer? It takes a row or column or what as an entry? (Sorry for being completely idiot)
17:06
Bertl
it doesn't debayer at all
17:07
troy_s
Good. So I'm not losing my mind.
17:07
troy_s
So all of the profiling happens at the Bayer level?
17:08
Bertl
yes
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philippej|away
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designbybeck_
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18:38
philippej
hi again everyone !
18:39
Bertl
wb philippej!
18:40
philippej
wishes we'll see some summaries of se6astian's ergonomic group
18:40
philippej
documenting is such a tedious task...
18:41
Bertl
indeed
18:43
troy_s
FFMPEG is in OIIO.
18:43
troy_s
That's rather... huge.
18:43
troy_s
https://github.com/OpenImageIO/oiio/pull/928
18:46
Bertl
but makes sense
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dmjnova
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19:47
dmjnova
hi Bertl
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20:08
Bertl
hey dmjnova!
20:12
Bertl
off for a nap ... bbl
20:12
Bertl
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philippej
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se6astian
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Bertl_zZ
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22:28
Bertl
back now ...
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mooseboobs
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Bertl
wb mooseboobs!
22:59
mooseboobs
lol thanks Bertl