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#apertus IRC Channel Logs

2020/02/17

Timezone: UTC


07:35
se6ast1an
good day
08:17
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08:17
Bertl_oO
off to bed now ... have a good one everyone!
08:17
Bertl_oO
changed nick to: Bertl_zZ
10:31
intrac
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11:54
RexOrCine|away
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14:22
rahul
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14:52
BAndiT1983|away
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15:39
Spirit532
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16:08
Bertl_zZ
changed nick to: Bertl
16:09
Bertl
morning folks!
16:25
RexOrCine
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16:26
RexOrCine|away
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16:51
se6ast1an
meeting in 9 minutes!
17:00
se6ast1an
meeting!
17:00
se6ast1an
who is here?
17:00
se6ast1an
vup anuejn?
17:00
Bertl
is here ...
17:01
BAndiT1983
am also here
17:02
se6ast1an
great, BAndiT1983 do you want to start reporting as you are the only one who pmed me so far?
17:02
BAndiT1983
yes, nothing big, but still
17:03
BAndiT1983
we are still preparing things for gsoc, like axiom remote firmware, especially performance, unit tests and docs
17:03
BAndiT1983
one thing which is not discussed, how we would provide access to the hardware for students and mentors
17:03
BAndiT1983
CI build is working again, also code coverage was added
17:03
BAndiT1983
that's it for now
17:04
se6ast1an
great thanks
17:04
anuejn
is here
17:04
se6ast1an
remote access to remote is indeed tricky
17:04
se6ast1an
there is the visualizer...
17:04
BAndiT1983
we could add remote commands which would trigger actions like buttons
17:04
vup
is here
17:04
se6ast1an
we could do a webcam setup and remote flashing...
17:05
BAndiT1983
so the axiom remote could be connected via usb to zbox and controlled through UART
17:05
se6ast1an
indeed button interaction via USB would be the only missing part
17:05
se6ast1an
or UART
17:05
BAndiT1983
maybe Rex can press buttons when he is at the hub ;)
17:05
Bertl
random buttons of course :)
17:06
Bertl
button presses can be simulated at the hardware level btw
17:06
BAndiT1983
but how should we trigger them?
17:06
se6ast1an
even better!
17:06
Bertl
BAndiT1983: electro shocks!
17:07
BAndiT1983
this is the usual stuff how electronics work
17:07
BAndiT1983
should we modify pic16 firmware and trigger it through UART to get the "full path"?
17:08
Bertl
so my approach to automated testing and/or remote control would be to design a test PCB which conencts to the remote PCB where the buttons are and simulates the button presses
17:09
Bertl
with THT buttons this is relatively trivial, with SMD buttons a little trickier though :)
17:10
BAndiT1983
sounds also as a good way, wasn't thinking about going that high-end into the topic, but if you could design the test board, then i'm all in, automated tests are currently on my list, also at work, so i try to gather more experience and ideas
17:11
Bertl
of course, the second best solution is to have a side channel for the PIC16s and some 'special' firmware to generate button presses on request
17:12
se6ast1an
is additional hardware feasible considering development and production time? interested students could roll in and get their hands dirty as soon as next week...
17:13
BAndiT1983
easiest solution is to manipulate the array with presses/rotations
17:13
Bertl
let's put it this way: it is unlikely that we have a remote 2.0 hardware in the next few weeks
17:13
Bertl
but rigging up existing hardware, e.g. building another remote without buttons for example and wiring those up to a relay card is probably feasible
17:14
Bertl
we could also use a cheap servo for the rotary encoder
17:14
Bertl
all simply connected to a raspberry pi for remote control
17:16
se6ast1an
right, anything else to add to this topic for today?
17:17
se6ast1an
otherwise vup is in line to report next
17:18
vup
Ok I guess I can continue
17:18
vup
I worked on several things,
17:18
vup
First, continued some internal rewrite of the control daemon, but thats not finished yet / nothing user facing yet
17:18
vup
I tired of the open source toolchain for the zynq 7010/7020 (https://github.com/daveshah1/nextpnr-xilinx/tree/xilinx-upstream) and a simple blinky test worked, haven't tried anything more complex yet.
17:18
vup
I tried the current beta gateware with the ghdl yosys frontend (a vhdl yosys frontend) but unfortunately it seems like its still not able to handle the beta gateware, I documented my experiment here: https://github.com/tgingold/ghdlsynth-beta/issues/87.
17:18
vup
Finally anuejn and me worked a bit on the gateware we are experimenting with that is supposed to be more modular / easier to adapt to multiple devices compared to the current gateware and got a basic axi lite peripheral working (just some simple register). That can be found here: https://github.com/axiom-micro/nGateware/tree/axi
17:18
vup
Thats it I think
17:19
vup
maybe anuejn wants to add something
17:20
Bertl
the AXI lite peripherial is already built with the FOSS toolchain?
17:20
vup
nope
17:20
Bertl
ah, okay, so that would probably be a good test then
17:20
vup
but that would certainly be something interesting to test
17:20
anuejn
we also explored ways of diescribing clocking inside the fpga with constraints which are then solved by configuring plls
17:21
anuejn
but that turned out to be rather complex (a minlp problem) and needs more time
17:21
oscar__
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17:21
Bertl
I can imagine ... and I'm pretty sure it doesn't even cover the PLL/MMCM oddities yet
17:22
oscar__
Sorry Iâm late. Had a phone call.
17:22
anuejn
well... currently it is a rather abstract thing, where you stuff in a theoretical description of the pll
17:22
anuejn
Bertl: what oddities do you mean
17:23
anuejn
are there any paticular footguns?
17:23
se6ast1an
welcome oscar__
17:23
oscar__
Hi!
17:24
Bertl
things like phase relations, phase and frequency tuning, frequencies which can be generated in different ways (i.e. with different settings, where one is preferable over the other), etc
17:24
anuejn
hm... yeah, no
17:25
anuejn
i had no idea of how to handle phase relations (yet)
17:25
anuejn
that needs another brainstorm
17:26
anuejn
phase relation is only realy applicable when two clocks run at the same frequency?
17:26
vup
i guess any integer multiple should work?
17:26
Bertl
yep
17:26
anuejn
ah i see
17:26
Bertl
clocks with phase offsets are typically used for sampling
17:27
Bertl
e.g. DDR or supersampling
17:27
Bertl
where you know that your clock fabric can only handle so and so much, but the input gates are way faster
17:27
Bertl
DDR is probably the classic example
17:27
anuejn
ah okay
17:28
Bertl
(DDR as in double data rate not as in DDR memory :)
17:31
se6ast1an
thanks for the report - very technical but exciting :)
17:31
se6ast1an
anything else to add to this matter?
17:31
vup
If i can just quickly add something:
17:31
se6ast1an
sure
17:32
vup
I just tried the axi lite peripheral with the open source toolchain and it works ;)
17:32
Bertl
great! that is on zynq 7010, yes?
17:32
anuejn
nice :)
17:32
vup
yes thats on zynq 7010
17:33
Bertl
does the toolchain already support 7020 as well?
17:33
vup
yes
17:33
Bertl
last time I tried they had a bunch of issues with the fuzzers
17:33
anuejn
(nextpnr, not vpr)
17:33
vup
(I can test it on the beta later aswell, I just had the micro already setup)
17:34
Bertl
sounds great! very interested in trying ...
17:34
se6ast1an
very nice indeed!
17:34
vup
Ah and as I now have the beta with me, testing HDMI / verifying the HDMI plugin module is working correctly with the beta should be easy aswell
17:34
Bertl
perfect, let me know how that goes!
17:34
vup
sure
17:35
se6ast1an
great
17:35
se6ast1an
anything else to add?
17:36
vup
nope I think thats actually it from me ;)
17:36
se6ast1an
thanks!
17:36
se6ast1an
Bertl, anything to report?
17:37
Bertl
sure
17:37
se6ast1an
please go ahead
17:38
Bertl
as you all know, we got the new power board PCBs from OSHpark, but unfortunately the oversized drill hit again ... i.e. vias are drilled with 14mil (supped to be 8/10mil) so there are problems
17:38
Bertl
nevertheless, I managed to get the relevant parts of one PCB working so that we can continue testing the changes
17:39
Bertl
currently I'm working on the firmware for the power controller and testing the interfaces to the rest of the power board
17:40
Bertl
I couldn't test the input switching regulators yet, because this requires the power controller to be functional, but everything looks fine so far
17:41
Bertl
on the other end, my USB3 test PC rig stopped working (doesn't boot anymore) so I have to disassemble and repair it soon
17:42
Bertl
we did do some work on reading raw file via python, so this code should probably be addded to the repository at some point
17:42
Bertl
and during tests I discovered that our 'simple debayer' with imagemagick doesn't work anymore with the newer imagemagick versions
17:43
Bertl
but this is relatively easy to fix, maybe we should add a task for it to the lab
17:44
Bertl
otherwise I've mostly recovered from the flu, so things should be moving again in the next weeks
17:44
Bertl
that's it from my side
17:45
se6ast1an
https://lab.apertus.org/T1164
17:45
se6ast1an
<Bertl> we did do some work on reading raw file via python, so this code should probably be addded to the repository at some point <- its in the LAM email right?
17:45
Bertl
yep
17:46
se6ast1an
http://vserver.13thfloor.at/Stuff/LAM/
17:46
se6ast1an
will add lab task as well
17:46
Bertl
good idea! thanks!
17:47
se6ast1an
https://lab.apertus.org/T1165
17:48
se6ast1an
thanks for the report!
17:48
se6ast1an
quick update from me then
17:49
se6ast1an
-) ordered lots of screws for CP enclosure
17:49
se6ast1an
we discovered minor issues at fosdem
17:49
se6ast1an
torx screws stick out a bit from surface, in contrast to hex screws
17:49
se6ast1an
-) optical shim pieces production method was discussed
17:50
se6ast1an
laser cuttering, metal etching or stamping so far
17:50
se6ast1an
prototype will probably be cut with scissors
17:50
se6ast1an
still need to discuss some things with manfred
17:51
se6ast1an
there is a hackathon planned in vienna 6.4 - 12.4 roughly
17:51
se6ast1an
no details decided yet
17:51
se6ast1an
gsoc next date coming up is 20.2: mentoring orgs anounced
17:52
oscar__
Shim pieces for the lens mount?
17:52
se6ast1an
yes
17:53
se6ast1an
lastly I want to organize the collection of beta shot sample footage (stills, videos, stopmotion, timelapse, etc.) better and make sure that we can collect and analyse any issues discovered there effectively
17:53
se6ast1an
a concept for this has been written and circulated to a few people so far, will involve more people over the course of the next week or so
17:54
se6ast1an
thats it from my side
17:54
se6ast1an
anyone else want to share/report?
17:56
gsalazar
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17:56
se6ast1an
right then I guess we can conclude todays meeting and meet again same time next week
17:57
RexOrCine
Nothing relevant to development my side.
17:58
oscar__
See you next week!
17:58
se6ast1an
meeting concluded!
17:59
se6ast1an
i am off to the superrmarket
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18:40
metal_dent[m]
In the readme, the cmake .. step is giving an error :
18:40
metal_dent[m]
"string sub-command STRIP requires two arguments."
18:40
metal_dent[m]
It can be fixed by adding quotes around the STRIP line in the CMakeLists.txt like this :
18:40
metal_dent[m]
`string(STRIP "${SDL2_LIBRARIES}" SDL2_LIBRARIES)`
18:40
metal_dent[m]
* In the readme, the `cmake ..` step is giving an error :
18:40
metal_dent[m]
"string sub-command STRIP requires two arguments."
18:41
metal_dent[m]
* In the readme, the `cmake ..` step is giving an error :string sub-command STRIP requires two arguments."
18:42
metal_dent[m]
* In the readme, the `cmake ..` step is giving an error :
18:42
metal_dent[m]
`string sub-command STRIP requires two arguments`
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19:01
BAndiT1983
metal_dent[m]: which branch are you using?
19:02
metal_dent[m]
dev
19:02
BAndiT1983
ok, just wanted to ensure
19:03
BAndiT1983
the problem is known it's due the changes in the sdl2 lib
19:04
metal_dent[m]
And `make -j4` is also giving some errors
19:04
thiblahute_
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19:28
BAndiT1983
why?
19:29
BAndiT1983
make -j4 just tells the compiler to use 4 threads, race conditions occur very seldom, if at all, at least for me
19:30
metal_dent[m]
it's giving SDL related errors
19:31
BAndiT1983
undefined reference?
19:31
metal_dent[m]
yes!
19:32
RexOrCine
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19:32
BAndiT1983
interesting, dev branch should already have a fix, also the double quote fix is there
19:32
BAndiT1983
i suppose you use archlinux or derivative, there is this line for the fix -> SET(SDL2_LIBRARIES SDL2::SDL2)
19:33
BAndiT1983
have you gat any errors while "cmake .."?
19:33
RexOrCine|away
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19:33
metal_dent[m]
yes I use manjaro
19:33
metal_dent[m]
> have you gat any errors while "cmake .."?
19:33
metal_dent[m]
not after adding the quotes
19:34
BAndiT1983
but double quotes are already there in the dev branch
19:34
BAndiT1983
find_package(SDL2 REQUIRED)# Fix for ArchLinux, see https://bbs.archlinux.org/viewtopic.php?id=235931if("${SDL2_LIBRARIES}" STREQUAL "") SET(SDL2_LIBRARIES SDL2::SDL2)ELSE() string(STRIP "${SDL2_LIBRARIES}" SDL2_LIBRARIES)ENDIF()include_directories(${SDL2_INCLUDE_DIRS})
19:34
BAndiT1983
sorry, formatting got lost, will do pastebin
19:35
BAndiT1983
https://pastebin.com/WJjMHRxr
19:37
metal_dent[m]
> but double quotes are already there in the dev branch
19:37
metal_dent[m]
are you sure? i just checked on the github again and quotes are not there
19:38
BAndiT1983
https://github.com/apertus-open-source-cinema/AXIOM-Remote/blob/dev/AXIOM_Remote_Firmware_Visualizer/CMakeLists.txt
19:38
BAndiT1983
are there any missing?
19:39
BAndiT1983
first argument has double quotes, second does not require any usually, also manjaro here and it runs without a problem since the fixes were done
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19:40
metal_dent[m]
oh, sorry I just checked. I was setting up the remote visualizer ð
19:42
BAndiT1983
ah, then i understand, sorry, it's our mistake that we haven't archived it yet, will move old projects to Archive folder soon
19:43
metal_dent[m]
okay, cool. I'll now do this one then :)
19:44
BAndiT1983
important folders are Bootloader, Firmware and AXIOM_Remote_Firmware_Visulaizer
19:44
BAndiT1983
also FirmwareTest for catch2 unit tests
19:44
metal_dent[m]
okay, thanks a lot!
19:44
BAndiT1983
no problem
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23:06
Bertl
off to bed now ... have a good one everyone!
23:07
Bertl
changed nick to: Bertl_zZ