11:19 | S3bastian | joined the channel | |
11:47 | Bertl | morning everyone!
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12:09 | S3bastian | hello!
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12:09 | S3bastian | I just ordered another zedboard
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12:09 | S3bastian | one for me
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12:09 | S3bastian | so I can test all the cool things you created so far :)
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12:09 | Bertl | great!
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12:12 | Bertl | do you want to solder your own pmod debug board like dmj_nova or should I prepare one for you?
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12:16 | S3bastian | I don't if I will need it yet tbh
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12:17 | S3bastian | *don*t know
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12:18 | Bertl | okay, no problem, I'll assemble one when I find some spare time so you can get it when you need/want it
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12:33 | S3bastian | great
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16:33 | se6astian | joined the channel | |
16:36 | se6astian | Im starting with the size verification of the parts now
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16:36 | se6astian | would you mind putting an apertus logo on the silkscreen btw?
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16:37 | se6astian | next to the ohw logo?
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17:24 | se6astian | spacing verification complete
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17:27 | se6astian | email sent
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17:29 | se6astian | the logo is available as vector EPS here btw: https://www.apertus.org/logo
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17:29 | se6astian | let me know if you need it converted to another format
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20:17 | Bertl | se6astian: no problem, please convert the logo to an eagle part (if you want it to be recognizeable) consisiting of polygons (lines, arcs) similar to the open hardware logo or if you do not care how it looks, convert it to 200dpi bmp file (this will be imported as 'dots' in eagle)
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20:23 | se6astian | what formats can eagle import?
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20:23 | se6astian | any vector ones?
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20:26 | Bertl | nope, nothing as far as I know
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20:26 | Bertl | only bitmaps as single dots basically
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20:27 | Bertl | so for a simple logo like the apertus one, probably the easiest way is to simply recreate it from scratch (as polygons)
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20:36 | se6astian | http://www.electronics-lab.com/blog/?p=21180
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20:45 | Bertl | looks nice
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20:50 | se6astian | but doesnt work ;)
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20:50 | se6astian | but this one does!
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20:50 | se6astian | http://todbot.com/blog/2011/06/06/from-illustrator-to-eagle-vector-graphics-in-circuits/
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21:02 | se6astian | I emailed you the dxf, is it OK if you do the import?
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21:02 | Bertl | I can try
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21:02 | se6astian | please do
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21:03 | se6astian | otherwise I can create a BRD file with just this logo, can you copy/paste it from there?
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21:04 | Bertl | yep, that would be fine too
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21:11 | se6astian | hmm I am having trouble with polygons inside each other
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21:12 | Bertl | they can be changed from solid to cut-out
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21:12 | se6astian | like the "a" is filled inside the "bauch" :)
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21:12 | se6astian | ah!
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21:12 | Bertl | and you probably need to adjust the rank
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21:17 | se6astian | can you give it a try?
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21:19 | Bertl | upload whatever you have so far please
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21:21 | se6astian | emailed
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21:24 | se6astian | it seems my problem is that I imported as polygon but I should have imported as wire
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21:25 | se6astian | but then can it still be "filled"?
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21:38 | Bertl | hmm, it seems cutouts are only supported on copper layers
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21:38 | Bertl | so you want/need to adjust the polygons accordingly
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21:41 | Bertl | I'll give it a try a little later
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21:47 | se6astian | I just tried importing a BMP
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21:47 | se6astian | doesnt look that bad actually
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21:49 | Bertl | yeah, well, problem is, the silk screen is 200dpi so it might not be what you expect at small sizes
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21:50 | se6astian | but then the way how we import it doesnt matter anyway does it?
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21:52 | Bertl | the bitmap results in dots, the dots will be there regardless of the size, so there will be more white
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21:53 | Bertl | the polygon is rastered at the fab, so it will be the best possible representation
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21:53 | Bertl | but I'm fine with a bmp import as well
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21:54 | Bertl | I'm still not sure where you want to put it though (and at what size)
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21:54 | Bertl | can you give me some coordinates (rectange) where?
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21:55 | Bertl | we could put it at moderately large size in the power regulator section on the top
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21:55 | se6astian | sounds good
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21:56 | se6astian | if its on the visible side when the pcb is attached to the zedboard that would be great :)
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21:56 | Bertl | but in this case, we definitely want a vector version
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