Current Server Time: 13:36 (Central Europe)

#apertus IRC Channel Logs

2021/06/14

Timezone: UTC


02:02
Bertl_oO
off to bed now .. have a good one everyone!
02:02
Bertl_oO
changed nick to: Bertl_zZ
07:48
se6astian
good day
08:43
metaldent
joined the channel
08:47
Spirit532
joined the channel
09:13
metaldent
left the channel
09:33
metaldent
joined the channel
10:23
Bertl_zZ
changed nick to: Bertl
10:23
Bertl
morning folks!
10:45
se6astian
good day
14:05
Dest123
joined the channel
17:00
Bertl
Meeting Time!
17:01
Dest123
is here
17:01
Bertl
please let me know who is here and those who want to report, pleas msg me
17:01
Bertl
*please
17:01
metaldent
is present
17:01
Bertl
se6astian: notified me that he won't make it to the meeting in time, so I'm taking over for now ...
17:02
vnksnkr
is here
17:02
tpw_rules
hello
17:02
Bertl
okay, Dest123 please go ahead with your report ...
17:03
Dest123
Hi :)
17:04
Dest123
I was a little preoccupied last week at my university but I managed to get some work done regarding the data channels
17:05
Dest123
I've completed an image data test and integrated it with the training data on the output channels
17:06
cscar
joined the channel
17:06
Dest123
unfortunately the image generation doesn't support all of the output modes but I'm working on that now
17:06
cscar
HI
17:06
vup
is here
17:07
Dest123
Once finished, I the output channels should be ready for a full test
17:07
Bertl
sounds great!
17:07
Dest123
that's it for me :)
17:07
tpw_rules
Dest123: where is your work available?
17:07
Bertl
thanks!
17:08
Dest123
you can find it here, but it's not completely up to data
17:08
Dest123
https://github.com/Destfolk/CMV12000-Simulation
17:09
tpw_rules
does it emulate the SPI registers?
17:09
Dest123
yes, the registers are complete and working fine
17:12
Bertl
okay, next up is vup, who wants to report a few things ...
17:13
vup
Ok
17:13
anuejn
is a bit late
17:14
vup
I worked on `amigen` and the next gen control daemon again
17:14
vup
Actually I don't think I reported last week, so the `amigen` updates are mostly from last week
17:14
vup
but basically a first prototype is done now and awaits testing (mostly by anuejn, but anybody interested should feel free to check it out)
17:15
vup
To finish it up, I mostly reworked the way ClockDomains are done, such that they are now eagerly bound instead of late bound
17:16
Bertl
thanks! sounds great!
17:16
vup
This has the advantage that one can actually find out all the necessary information about a ClockDomain (like the clock signal, wether it is a posedge or negedge clockdomain or wether it is resetless) at the time ones code is running
17:16
vup
The documentation is sparse but hopefully the tests show a bit how it is used: https://github.com/rroohhh/amigen/tree/main/tests
17:17
anuejn
(there was a rather nasty problem with clock polarity and memorys, that led to this)
17:17
anuejn
(see https://github.com/nmigen/nmigen/issues/611)
17:17
vup
Finally I also continued with the rpc part of the control daemon, where I started some first "actual" tests writing a python client and a simple rust server
17:18
vup
but thats still very wip
17:18
vup
and lacks a lot of features
17:18
vup
Ok thats it from the this week :)
17:18
anuejn
nice progress :)
17:18
Bertl
excellent! thanks a bunch for the report!
17:18
Bertl
next up is anuejn ...
17:19
anuejn
from my side there are mostly naps bugfixes this week
17:19
anuejn
also a minor improvement on the debugging tools side: StatusSignal can now use 'decoders' so that e.g. FSM states can be inspected in a Human readable way
17:20
anuejn
(which is very helpfull when debugging that an FSM is somehow 'stuck')
17:21
anuejn
also I cleared the major roadblock for me to work on my GSOC project :)
17:21
anuejn
thats it from my side for this week
17:21
Bertl
thanks!
17:21
Bertl
anybody else who wants to say a few words?
17:22
Bertl
(and didn't bother to msg me ;)
17:22
manav
Hi
17:23
Bertl
manav: would you like to report your progress?
17:23
manav
yes
17:23
Bertl
then please go ahead
17:23
manav
last week i was working on buliding a FSM for the eMMC controller
17:23
manav
I have studied the eMMC protocols and started to build central FSM
17:24
manav
I am currently only focusing on the eMMC controller right now ie only the FPGA part not focusing on the ZYNQ.So the first step is to right now is to establish communication with the eMMC device and the FPGA
17:25
manav
I am hoping to have a basic setup ready so that I can run some simulations by the end of the week
17:25
manav
then i can have it validated by Bertl
17:26
manav
thats it from my end
17:26
Bertl
okay, great!
17:26
Bertl
let's make sure that we can actually test the HDL on real hardware as early as possible
17:26
manav
okay
17:27
Bertl
i.e. you might want to do some eMMC tests maybe even without a completely tested codebase
17:27
manav
ok will keep that in mind
17:28
Bertl
I'm saying that because the problem in the past often was that students developed and simulated a complete solution for weeks (or months) just to find out that the hardware behaves differently
17:28
Bertl
and then it is quite hard to get the project back on track ...
17:29
Bertl
anybody else eager to report?
17:29
vnksnkr
I had a little progress
17:29
Bertl
please, share ...
17:30
vnksnkr
last week I was working on the 'controller' entities i.e seperate signals for the push button and the encoders
17:31
vnksnkr
the encoder signals can be configured depending on the rpm and number of turns fed as inputs
17:33
vnksnkr
I'm a little new to the communication interface :) so rest of the time spent reading up on the JTAG interface and the corresponding primitives avaialbe on the MACHXO2
17:33
vnksnkr
available*
17:33
vnksnkr
thats it from me
17:33
Bertl
great!
17:34
Bertl
if you have any questions or want to test the JTAG interface, please let me know
17:34
vnksnkr
sure!
17:34
Bertl
cscar: anything you would like to report?
17:35
Bertl
tpw_rules: any news on your side?
17:36
tpw_rules
i don't think so. just been planning for when the sensor is ready. studying linux kernel stuff to figure out how to set up the SPI modules
17:36
tpw_rules
actually, i did get NAPS updated with the pinout for the Beta's sensor last tuesday. so that is new this meeting
17:37
Bertl
that's good news ;)
17:37
Bertl
so I spent most of the time last week on checking the Tele PCBs
17:38
Bertl
and while we had some nasty discoveries there, the overall quality is quite good and we should be able to rework the boards with minimal effort to produce high quality Betas
17:39
Bertl
there is some discussion with Tele necessary to figure out how to address the defects, but I'm optimistic that we can find a solution for that soon
17:39
Bertl
this also means that we should have full cameras for testing ready next week (if all goes well)
17:40
tpw_rules
excellent!
17:40
Bertl
that's it from my side, and I'm pretty sure we will hear some more from se6astian and BAndiT1983_ when they find the time ...
17:41
BAndiT1983_
Not much to report actually
17:41
Bertl
if nobody else has anything to report or discuss, I'll consider the meeting closed
17:41
BAndiT1983_
am trying to resume work on the communication from host to remote, but not much happened yet
17:41
cscar
Thanks all!
17:42
Bertl
thanks everyone! have a nice evening!
17:43
cscar
btw, nothing to report (was changing diapers when you asked ;)
17:43
Bertl
so no dirty diapers report today? :)
17:44
cscar
I'll tell you all about it next week!
17:44
cscar
bye!
17:45
cscar
left the channel
17:48
Bertl
off for now ... bbl
17:48
Bertl
changed nick to: Bertl_oO
18:05
illwieckz
left the channel
18:11
illwieckz
joined the channel
18:48
metaldent
left the channel
19:23
intrac_
joined the channel
19:26
intrac
left the channel
19:26
intrac_
changed nick to: intrac
19:37
se6astian
good evening, thanks Bertl for taking over the meeting moderation, quick updates from me: I found another nvme ssd to benchmark on PC and SBC (rock pi) and while there are some promising aspects: https://cloud.apertus.org/index.php/apps/gallery/s/TF6WAHpDkfSwaLx
19:38
se6astian
there is still top performance below 240MB/s with PRNG writing which is insufficient
19:38
se6astian
more tests and benchmarking now immanent
19:39
se6astian
beside that there was coordination with BAndiT1983_ and eppisai regarding remote tasks, next steps and refinements on the direction
19:39
se6astian
thats it from me
21:17
Dest123
left the channel
21:29
Dest123
joined the channel