01:02 | Bertl_oO | off to bed now .. have a good one everyone!
| |
01:02 | Bertl_oO | changed nick to: Bertl_zZ
| |
06:48 | se6astian | good day
| |
07:43 | metaldent | joined the channel | |
07:47 | Spirit532 | joined the channel | |
08:13 | metaldent | left the channel | |
08:33 | metaldent | joined the channel | |
09:23 | Bertl_zZ | changed nick to: Bertl
| |
09:23 | Bertl | morning folks!
| |
09:45 | se6astian | good day
| |
13:05 | Dest123 | joined the channel | |
16:00 | Bertl | Meeting Time!
| 16:01 | Dest123 | is here
|
16:01 | Bertl | please let me know who is here and those who want to report, pleas msg me
| |
16:01 | Bertl | *please
| 16:01 | metaldent | is present
|
16:01 | Bertl | se6astian: notified me that he won't make it to the meeting in time, so I'm taking over for now ...
| 16:02 | vnksnkr | is here
|
16:02 | tpw_rules | hello
| |
16:02 | Bertl | okay, Dest123 please go ahead with your report ...
| |
16:03 | Dest123 | Hi :)
| |
16:04 | Dest123 | I was a little preoccupied last week at my university but I managed to get some work done regarding the data channels
| |
16:05 | Dest123 | I've completed an image data test and integrated it with the training data on the output channels
| |
16:06 | cscar | joined the channel | |
16:06 | Dest123 | unfortunately the image generation doesn't support all of the output modes but I'm working on that now
| |
16:06 | cscar | HI
| 16:06 | vup | is here
|
16:07 | Dest123 | Once finished, I the output channels should be ready for a full test
| |
16:07 | Bertl | sounds great!
| |
16:07 | Dest123 | that's it for me :)
| |
16:07 | tpw_rules | Dest123: where is your work available?
| |
16:07 | Bertl | thanks!
| |
16:08 | Dest123 | you can find it here, but it's not completely up to data
| |
16:08 | Dest123 | https://github.com/Destfolk/CMV12000-Simulation
| |
16:09 | tpw_rules | does it emulate the SPI registers?
| |
16:09 | Dest123 | yes, the registers are complete and working fine
| |
16:12 | Bertl | okay, next up is vup, who wants to report a few things ...
| |
16:13 | vup | Ok
| 16:13 | anuejn | is a bit late
|
16:14 | vup | I worked on `amigen` and the next gen control daemon again
| |
16:14 | vup | Actually I don't think I reported last week, so the `amigen` updates are mostly from last week
| |
16:14 | vup | but basically a first prototype is done now and awaits testing (mostly by anuejn, but anybody interested should feel free to check it out)
| |
16:15 | vup | To finish it up, I mostly reworked the way ClockDomains are done, such that they are now eagerly bound instead of late bound
| |
16:16 | Bertl | thanks! sounds great!
| |
16:16 | vup | This has the advantage that one can actually find out all the necessary information about a ClockDomain (like the clock signal, wether it is a posedge or negedge clockdomain or wether it is resetless) at the time ones code is running
| |
16:16 | vup | The documentation is sparse but hopefully the tests show a bit how it is used: https://github.com/rroohhh/amigen/tree/main/tests
| |
16:17 | anuejn | (there was a rather nasty problem with clock polarity and memorys, that led to this)
| |
16:17 | anuejn | (see https://github.com/nmigen/nmigen/issues/611)
| |
16:17 | vup | Finally I also continued with the rpc part of the control daemon, where I started some first "actual" tests writing a python client and a simple rust server
| |
16:18 | vup | but thats still very wip
| |
16:18 | vup | and lacks a lot of features
| |
16:18 | vup | Ok thats it from the this week :)
| |
16:18 | anuejn | nice progress :)
| |
16:18 | Bertl | excellent! thanks a bunch for the report!
| |
16:18 | Bertl | next up is anuejn ...
| |
16:19 | anuejn | from my side there are mostly naps bugfixes this week
| |
16:19 | anuejn | also a minor improvement on the debugging tools side: StatusSignal can now use 'decoders' so that e.g. FSM states can be inspected in a Human readable way
| |
16:20 | anuejn | (which is very helpfull when debugging that an FSM is somehow 'stuck')
| |
16:21 | anuejn | also I cleared the major roadblock for me to work on my GSOC project :)
| |
16:21 | anuejn | thats it from my side for this week
| |
16:21 | Bertl | thanks!
| |
16:21 | Bertl | anybody else who wants to say a few words?
| |
16:22 | Bertl | (and didn't bother to msg me ;)
| |
16:22 | manav | Hi
| |
16:23 | Bertl | manav: would you like to report your progress?
| |
16:23 | manav | yes
| |
16:23 | Bertl | then please go ahead
| |
16:23 | manav | last week i was working on buliding a FSM for the eMMC controller
| |
16:23 | manav | I have studied the eMMC protocols and started to build central FSM
| |
16:24 | manav | I am currently only focusing on the eMMC controller right now ie only the FPGA part not focusing on the ZYNQ.So the first step is to right now is to establish communication with the eMMC device and the FPGA
| |
16:25 | manav | I am hoping to have a basic setup ready so that I can run some simulations by the end of the week
| |
16:25 | manav | then i can have it validated by Bertl
| |
16:26 | manav | thats it from my end
| |
16:26 | Bertl | okay, great!
| |
16:26 | Bertl | let's make sure that we can actually test the HDL on real hardware as early as possible
| |
16:26 | manav | okay
| |
16:27 | Bertl | i.e. you might want to do some eMMC tests maybe even without a completely tested codebase
| |
16:27 | manav | ok will keep that in mind
| |
16:28 | Bertl | I'm saying that because the problem in the past often was that students developed and simulated a complete solution for weeks (or months) just to find out that the hardware behaves differently
| |
16:28 | Bertl | and then it is quite hard to get the project back on track ...
| |
16:29 | Bertl | anybody else eager to report?
| |
16:29 | vnksnkr | I had a little progress
| |
16:29 | Bertl | please, share ...
| |
16:30 | vnksnkr | last week I was working on the 'controller' entities i.e seperate signals for the push button and the encoders
| |
16:31 | vnksnkr | the encoder signals can be configured depending on the rpm and number of turns fed as inputs
| |
16:33 | vnksnkr | I'm a little new to the communication interface :) so rest of the time spent reading up on the JTAG interface and the corresponding primitives avaialbe on the MACHXO2
| |
16:33 | vnksnkr | available*
| |
16:33 | vnksnkr | thats it from me
| |
16:33 | Bertl | great!
| |
16:34 | Bertl | if you have any questions or want to test the JTAG interface, please let me know
| |
16:34 | vnksnkr | sure!
| |
16:34 | Bertl | cscar: anything you would like to report?
| |
16:35 | Bertl | tpw_rules: any news on your side?
| |
16:36 | tpw_rules | i don't think so. just been planning for when the sensor is ready. studying linux kernel stuff to figure out how to set up the SPI modules
| |
16:36 | tpw_rules | actually, i did get NAPS updated with the pinout for the Beta's sensor last tuesday. so that is new this meeting
| |
16:37 | Bertl | that's good news ;)
| |
16:37 | Bertl | so I spent most of the time last week on checking the Tele PCBs
| |
16:38 | Bertl | and while we had some nasty discoveries there, the overall quality is quite good and we should be able to rework the boards with minimal effort to produce high quality Betas
| |
16:39 | Bertl | there is some discussion with Tele necessary to figure out how to address the defects, but I'm optimistic that we can find a solution for that soon
| |
16:39 | Bertl | this also means that we should have full cameras for testing ready next week (if all goes well)
| |
16:40 | tpw_rules | excellent!
| |
16:40 | Bertl | that's it from my side, and I'm pretty sure we will hear some more from se6astian and BAndiT1983_ when they find the time ...
| |
16:41 | BAndiT1983_ | Not much to report actually
| |
16:41 | Bertl | if nobody else has anything to report or discuss, I'll consider the meeting closed
| |
16:41 | BAndiT1983_ | am trying to resume work on the communication from host to remote, but not much happened yet
| |
16:41 | cscar | Thanks all!
| |
16:42 | Bertl | thanks everyone! have a nice evening!
| |
16:43 | cscar | btw, nothing to report (was changing diapers when you asked ;)
| |
16:43 | Bertl | so no dirty diapers report today? :)
| |
16:44 | cscar | I'll tell you all about it next week!
| |
16:44 | cscar | bye!
| |
16:45 | cscar | left the channel | |
16:48 | Bertl | off for now ... bbl
| |
16:48 | Bertl | changed nick to: Bertl_oO
| |
17:05 | illwieckz | left the channel | |
17:11 | illwieckz | joined the channel | |
17:48 | metaldent | left the channel | |
18:23 | intrac_ | joined the channel | |
18:26 | intrac | left the channel | |
18:26 | intrac_ | changed nick to: intrac
| |
18:37 | se6astian | good evening, thanks Bertl for taking over the meeting moderation, quick updates from me: I found another nvme ssd to benchmark on PC and SBC (rock pi) and while there are some promising aspects: https://cloud.apertus.org/index.php/apps/gallery/s/TF6WAHpDkfSwaLx
| |
18:38 | se6astian | there is still top performance below 240MB/s with PRNG writing which is insufficient
| |
18:38 | se6astian | more tests and benchmarking now immanent
| |
18:39 | se6astian | beside that there was coordination with BAndiT1983_ and eppisai regarding remote tasks, next steps and refinements on the direction
| |
18:39 | se6astian | thats it from me
| |
20:17 | Dest123 | left the channel | |
20:29 | Dest123 | joined the channel |