Current Server Time: 08:10 (Central Europe)

#apertus IRC Channel Logs

2016/12/13

Timezone: UTC


23:18
slikdigit
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Spirit532
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01:37
Bertl_oO
off to bed now ... have a good one everyone!
01:38
Bertl_oO
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02:24
jucar
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06:22
intracube
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06:32
se6astian|away
changed nick to: se6astian
06:35
se6astian
good morning
06:42
comradekingu
good morning
06:43
comradekingu
translating mumble, it is rough
07:19
simonrepp
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07:44
simonrepp
animated beta exploded view inside unreal engine 4 (ï¾ï¾â½ï¾)ï¾ http://fdpl.foundation/beta-ue4.mp4
07:44
simonrepp
(with dramatic music, by accident :D)
07:46
pusle
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07:51
Bertl_zZ
changed nick to: Bertl
07:51
Bertl
morning folks!
07:53
Bertl
simonrepp: nice :)
08:06
simonrepp
Bertl I'm pondering to finally look into the PCB 3D model generation from gerber (?) files we talked about in summer, can you point me to where i find the pieces i have to put together? (eg. the 3d parts library and the source files which i'll parse as a start?)
08:10
Bertl
we currently still use Eagle. the Eagle designs can be found here: http://vserver.13thfloor.at/Stuff/AXIOM/BETA/
08:11
Bertl
the files are XML, so can be parsed easily
08:11
Bertl
we also use a script to generate gerber files from the board files. se6astian has the details on that
08:12
Bertl
for the 3D part libraries, I have no idea what is suitable and what not ..
08:12
simonrepp
so there's different 3d part libraries to choose from?
08:13
simonrepp
which of these files are the xml based eagle designs?
08:13
simonrepp
.brd? .sch? :) ...
08:13
Bertl
the .sch are the schematic files (probably of little interest)
08:13
Bertl
the .brd are the board design files
08:14
Bertl
they contain the positions and rotations, etc
08:14
simonrepp
i see, wires, parts (with identifiers), cool
08:15
se6astian
btw
08:15
se6astian
http://3dbrdviewer.cytec.bg/
08:15
simonrepp
does this contain ALL the things on every board, or will there be something i'm missing if i use this to generate a 3d model?
08:15
Bertl
se6astian: yeah, just found that as well
08:16
simonrepp
hey great so i was just put out of work! :D
08:17
Bertl
big problem though: the boards are not purple!!!!
08:17
simonrepp
haha, i knew there was a catch
08:19
Bertl
ah, no, you can select the color :)
08:20
Bertl
but the results are not convincing after a quick test ... i.e. a lot of missing parts it seems
08:21
Bertl
I tried with the power board, and it looks like there are 10 of 250 components rendered
08:21
Bertl
and half of them look wrong :)
08:22
Bertl
but maybe it can be adapted/improved ... no idea
08:23
simonrepp
it's possible to replace missing components, but it seems very ephemeral, no way to save/export, no scripting ..
08:25
simonrepp
so i mainly have 2 questions still:
08:25
simonrepp
are there any parts libraries we already know that we could/should use (links?)?
08:26
Bertl
http://www.traceparts.com/
08:26
Bertl
https://grabcad.com/library/electronic-components-1
08:27
simonrepp
and assuming i manage to create script(s) that successfully gather all parts and correctly place them according to the .brd files - will i get complete 3d representations of a board, or are there things on the board that are NOT represented in the eagle designs?
08:27
Bertl
many manufacturers also supply step files and similar
08:28
Bertl
the PCB itself is represented in the eagle files too, but it is probably way easier to use the gerber files for that, but I might be completely wrong here
08:30
Bertl
distributors also keep extensive part libraries, like for example:
08:30
Bertl
http://www.digikey.com/en/resources/3d-models
08:31
Bertl
http://at.rs-online.com/web/generalDisplay.html?id=3D-CAD
08:31
Bertl
farnell has the 3D models linked to the parts
08:33
simonrepp
whew looks like a lot of patchwork :/ ... but very cool, bookmarked all the links!!
08:34
Bertl
I'm sure there are many more, but for our purpose it would be more than sufficient to have a custom part library
08:34
Bertl
i.e. a way to associate a 3D file (STEP, STL, etc) with a part
08:34
simonrepp
yeah i see, looks like i'll just have to see what's to be found where and then put together all the pieces step by step, working through everythign that's missing
08:34
Bertl
and get the placement right as well :)
08:35
simonrepp
are the gerber files for the pcb itself also at the /Stuff/AXIOM/BETA/ location?
08:35
Bertl
we can store 'attributes' in the eagle files, so if some kind of '3d-model' id would help, it could certainly be done
08:36
simonrepp
i might get back to that offer, but i think it would be cleaner to do the mapping inside the EAGLE->3D conversion pipeline itself
08:36
Bertl
probably only a few gerber are there ... se6astian should know where to find the others, but they can also be generated with Eagle from the board files (even on the command line)
08:37
simonrepp
(unless there are components where there is no unique identification possible from the EAGLE file itself, there we might have to augment right at the source i guess)
08:37
Bertl
no attributes -> less work, so I'm happy with that :)
08:38
simonrepp
exactly :) and less organization required for me as well if i can just adjust the mapping myself
08:38
simonrepp
if the gerber files are generated from the eagle files anyway, then i think i'll just skip the gerber files altogether (unless i find reasons that i need them when i'm actually working stuff out)
08:39
Bertl
okay
08:39
simonrepp
less puzzle pieces to put together/hunt after .. ;)
08:41
simonrepp
well great, i think i can start with what i have here :) thanks so much!
08:41
Bertl
you're very welcome!
08:43
se6astian
some gerber files are linked on the wiki: https://wiki.apertus.org/index.php/AXIOM_Beta_Main_Board_V0.36_R1.2
08:43
se6astian
if still required
08:44
simonrepp
regarding irc meeting -> my initial suggestion would be 15h or 16h CET, and during weekdays (from my side no preference for any specific of them), does that sound good for you guys?
08:44
simonrepp
if you have a preferred day, say so now! :)
08:44
Bertl
16:00 CET sounds good
08:44
se6astian
that works on some weekdays but not on all
08:45
se6astian
I did a doodle recently with 4 other team members and we settled for 19:00
08:45
se6astian
some people were still at work at 15:00, 16:00
08:45
se6astian
monday/tuesday I am most flexible with time
08:45
simonrepp
ok fine as well if that includes more people
08:46
simonrepp
how about monday 19th at 19h as a first date?
08:47
se6astian
btw in case you did not see it yet
08:47
se6astian
there is a project to do 3d visualization of brd files in sketchup
08:47
se6astian
https://eagleup.wordpress.com/
08:48
se6astian
I have an appointment on monday 19th at 19:00 I am afraid
08:49
simonrepp
tuesday 20th 19h?
08:49
se6astian
another appointment :)
08:50
Bertl
the 19:00 appointments :)
08:50
se6astian
yes its the typical "after work I am free" time :)
08:50
Bertl
you work on mondays? :)
08:51
simonrepp
ok then other suggestions please :)
08:53
simonrepp
generally we should be aiming for something that's generally inclusive for as many people as possible, but i think a regular sustainable meeting should not depend on any single person to absolutely be there, because then it can't work anyway :)
08:54
simonrepp
if you're fine with missing out already on the first test meeting se6astian then we can do mon/tue 19h anyway if that's a good general choice for everyone (just not for you specifically the first time)
08:55
se6astian
fine for me to miss the first meeting :)
08:57
simonrepp
ok then i'll just pick either of the two next week and announce that
08:57
se6astian
great
08:58
simonrepp
i'll announce on team@ and .. somewhere else?
08:59
Bertl
skinkie: ping?
09:01
simonrepp
ultimately i think this is something to publicly announce as well (it's a great way for the public to see activity and openness for a project, at least that's how i experience it for the blender irc meetings eg), but maybe for the first test meetings we can figure out how it works for ourselves, then we'll later we'll be able to pull off sensible meetings with a larger audience as well :)
09:04
se6astian
simonrepp: there is also axiom-community@ with 337 members
09:04
se6astian
and axiom-dev@ with 48 members
09:04
se6astian
but I am not sure how big and how internal/external we should start
09:04
se6astian
probably with a smaller circle first
09:12
simonrepp
ok i'll add axiom-dev@ then, axiom-community@ starting with one of the following meetings when we know what we are doing :D
09:12
simonrepp
i'm documenting this on lab.apertus.org right now, and will announce it the next days
09:13
se6astian
great
09:22
simonrepp
ok, documented: https://lab.apertus.org/T260 thanks everyone, i'm off :)
09:22
simonrepp
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10:10
Bertl
off for now .. bbs
10:10
Bertl
changed nick to: Bertl_oO
13:23
jucar
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13:25
intracube
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13:32
skinkie
ping
13:33
Bertl_oO
changed nick to: Bertl
13:33
Bertl
hey
13:38
skinkie
hi
13:43
se6astian
skinkie: you wanted to know the details of the Betas custom kernel herbert created IIRC
13:45
Bertl
I just checked, and it does not contain many modifications at the moment, more precisely it is a single change to the UART code
13:45
Bertl
but it did contain a lot more before xilinx updated the kernel and it might contain a number of other patches in the future when we add custom drivers/fixes
13:46
Bertl
in general I'd suggest we create a git repository for that and use proper tags for automated builds
14:10
jucar
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14:14
Spirit532
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14:16
skinkie
Bertl: is the generation of the kernel and bootloader something that is stable?
14:16
skinkie
I recall we had to change things before, and even were considering to use the open Elphel instead of the Xilinx bootloader. What is the status on this?
14:18
Bertl
bootloader is unclear, we currently use the very same bootloader files we generated back then
14:19
Bertl
what we definitely need is to get a proper u-boot config and environment into the mix (probably best solution would be a git repository for that too)
14:20
Bertl
for the environment I promised to follow up with a separate e-Mail but haven't had the time yet to work it out
14:22
Bertl
from the register settings/hardware config the bootloader will not need to change often even if we change device tree and other stuff it shouldn't be affected
14:42
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se6astian
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15:37
Bertl
off for now ... bbl
15:37
Bertl
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se6astian|away
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