Current Server Time: 01:07 (Central Europe)

#apertus IRC Channel Logs

2014/05/13

Timezone: UTC


02:42
Bertl
off to bed now ... have a good one everyone!
03:45
gcolburn
joined the channel
04:10
gcolburn
left the channel
06:02
niemand
joined the channel
06:03
danhanes
left the channel
06:37
niemand
left the channel
08:25
se6astian
joined the channel
08:37
jucar
joined the channel
08:56
sb0
joined the channel
09:12
jucar
left the channel
09:25
sb0
left the channel
10:17
jucar
joined the channel
10:39
se6astian
left the channel
10:40
jucar
left the channel
10:52
Bertl
morning folks!
11:48
se6astian
joined the channel
14:14
se6astian
left the channel
15:12
se6astian
joined the channel
16:52
mookyj
joined the channel
16:52
mookyj
Hi, I joined a little while back and looking to dive in and help out
16:53
mookyj
I can offer layout services (silicon/pcb) and sensor/camera consulting
16:54
mookyj
go to mikejoyner.com and or townlinetechnolgies.com for background
17:12
se6astian
Ah hi mike
17:12
se6astian
great to see you here
17:13
se6astian
I am starting to cook dinner but maybe Herbert is here and can chat with you a bit?
17:13
Bertl
hey mookyj!
17:14
Bertl
IIRC, I sent you the link to the AXIOM Alpha schematic and layout (for the sensor frontend)
17:15
Bertl
did you get a chance to look at those?
18:15
mookyj
hmm, I did not get those, let me check all my mail folders
18:16
mookyj
Are you looking at opinions, or additional work on these?
18:17
Bertl
no problem, they are here: https://github.com/apertus-open-source-cinema/alpha-hardware/tree/master/SFE-PCB
18:17
mookyj
Nopoe, I haven't gotten any email with those
18:17
Bertl
as you probably know, we are currently working on Beta
18:17
jucar
joined the channel
18:17
Bertl
and Beta is designed for developers, so we also want to make sure that the PCBs can be easily reproduced
18:18
Bertl
which in turn means, that we will work within the constraints of OSHpark, to allow folks to use the same service
18:18
mookyj
I have a full suite of Mentor Pads SE here
18:18
mookyj
I can certainly looked the files over
18:19
Bertl
the existing SFE-PCB files are those from the Alpha prototype, but they will give you a good idea regarding sensor for example
18:19
Bertl
of course, any help with the Beta design and testing is also quite welcome
18:20
mookyj
I see ther limits on PCB could be a problkem down stream as you likely need 5/5 or 4/4 rules the BGA's may force that
18:20
Bertl
(we just have to figure out a way to exchange the data, we currently use Eagle and slowly try to switch to KiCad
18:20
Bertl
note: no BGA in the Beta
18:21
mookyj
OK, I have KiCAD loaded, and played around a little bit in it
18:21
Bertl
well, yes, for the socket maybe, but at 1.27mm spacing
18:21
Bertl
the Beta sensor/main board will attach to the FCI connectors of the Microzed
18:22
mookyj
I will look these over and give an impression, also it would be helpful as to how fdar clocks will be pushed, as cinematography really pushed the data rates, especially 12/14 nit
18:22
Bertl
carry the sensor socket and and provide connectors for two I/O boards, one on each side
18:22
Bertl
http://vserver.13thfloor.at/Stuff/AXIOM/beta_pre02.png
18:23
Bertl
(this is seen from the front)
18:23
mookyj
I have been personally advocating mounting FPGA at least to grab the data, and do basic processing on back side of the board to keep that whole data loop short
18:24
Bertl
the FPGA is on the microzed, which directly connects through the two 100pin FCI connectors
18:24
Bertl
you might want to check out the microzed schematic as well
18:25
Bertl
http://www.zedboard.org/documentation/1519
18:25
mookyj
if one can get around cooling, haviong the FPGA on back side reduces power as driving a shorter net/load, and then you are looking at downstream data and power at the connectors
18:26
mookyj
I assume that there is additional post processing that could end up in another FPGA
18:26
Bertl
what kind of post processing do you have in mind?
18:27
mookyj
at the sensor, typically cds stuff, offset correction, gain correction (if required)binning, sensor timing, interpolation and or downsampling
18:28
mookyj
post sensor there are other processign cores for colkor correction, output to view finders, stuff like that
18:28
mookyj
excuse my mistyping
18:29
mookyj
Gotta run, I will look these files over tonight
18:29
Bertl
yes, we do that basically in the Zynq on AXIOM Alpha now
18:29
Bertl
https://wiki.apertus.org/index.php?title=Axiom_Alpha_Software#Image_Pipeline
18:29
Bertl
okay, no problem, cya
18:30
mookyj
thanks for the pipeline flow
18:30
Bertl
no problem
19:56
danieel
thats an interesting guy
19:59
niemand
joined the channel
20:45
niemand
left the channel
21:10
se6astian
good night
21:10
se6astian
left the channel
22:37
jucar
left the channel