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#apertus IRC Channel Logs

2020/04/13

Timezone: UTC


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BAndiT1983|away
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Bertl_zZ
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11:05
Bertl
morning folks!
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15:32
se6ast1an
meeting in 90 minutes - we recently switched to summer time I hope that didnt create any confusion
16:11
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megora
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16:47
simonrepp
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daFred
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17:00
se6ast1an
meeting time!
17:00
se6ast1an
welcome everyone!
17:01
simonrepp
o/
17:01
Bertl
\o/
17:01
metal_dent[m]
\o/
17:02
RexOrCine1
_o_
17:02
se6ast1an
in the traditional "speaker priviledge" going from one person to the next approach since we are more and more people here please send me a direct message now if you want to report/discuss/present something
17:03
se6ast1an
I will then hand the "priviledge" from one person to the other in an orderly manner :)
17:04
se6ast1an
simonrepp: do you maybe want to start with the elmyra progress/news?
17:04
simonrepp
se6ast1an sure
17:07
simonrepp
alrighty, a quick report on Elmyra from my side
17:08
simonrepp
that is https://github.com/apertus-open-source-cinema/elmyra for everyone who's not familiar with it
17:08
simonrepp
that was done originally in the course of the axiom gamma project, which is some 3 years ago or so
17:08
simonrepp
i've refurbished the technical basis of it over the last half year
17:09
simonrepp
server was rewritten in rust (from js)
17:09
simonrepp
all the frontend stuff updated to latest versions (which at javascript ecosystem pace means everything is probably outdated by now already anyway :))
17:10
simonrepp
functionally there's nothing new, I just wanted to get the project into a runnable state again so that people could pick up the codebase and build something new and shiny based on it
17:11
simonrepp
if there are any questions (i don't know if the format permits them anyway) let me know :)
17:12
se6ast1an
quick questions are OK, we should avoid indepth discussions at this point and move those to after reporting
17:12
simonrepp
cool, so unles there are quick questions that concludes my report
17:12
se6ast1an
you released version 1 recently right?
17:13
simonrepp
yes there is versinoning now (before there were only commit hash identified releases)
17:13
simonrepp
it's not a "omg finally a 1.0 release" thing though :)
17:13
simonrepp
(as little changed)
17:14
se6ast1an
but you said you consider the code "finished" for now and are looking for people who want to use and advance it with an actual application right?
17:14
simonrepp
yes it's out there for people to pick up
17:15
se6ast1an
and in the beginning elmyra was envisioned as webserver based tool but you packaged releases for every operating system now and everything is included to use it locally, correct?
17:15
simonrepp
it can be used either way now
17:15
se6ast1an
blender is still rendering infinitely though isnt it?
17:16
simonrepp
yes it's an experimental technical foundation
17:16
RexOrCine1
What would you suggest would be good directions in terms of additional features?
17:16
simonrepp
it works quite reliably but it's not a polished product
17:16
simonrepp
entirely depends on who wants to use it for me
17:17
simonrepp
but probably some sanity stuff like rendering priority
17:17
simonrepp
not infinite rendering
17:17
se6ast1an
I tried version 1 today and captured some screenshots: https://cloud.apertus.org/index.php/apps/gallery/s/dJEK7f56ZFfZ6py
17:17
simonrepp
posibilities to configure what formats get exported (currently all of them)
17:17
RexOrCine1
And is there anything you think requires improvement?
17:18
se6ast1an
I would use those to do some promotion on twitter, etc. as well to share the project link/source code, etc.
17:18
simonrepp
mostly the stuff i mentioned
17:18
RexOrCine1
That's in hand yeah.
17:18
simonrepp
it has to be molded into an actual product i guess
17:18
RexOrCine1
@SP
17:18
simonrepp
right now it's a conceptual foundation
17:19
simonrepp
the UX is vague though
17:19
simonrepp
it's not geared towards some final definitive workflow
17:19
simonrepp
if someone wants to pick up there, that'd be great
17:20
se6ast1an
many thanks simon! anything else to add ?
17:20
simonrepp
gladly, i think i covered everything from my side!
17:20
se6ast1an
great!
17:21
se6ast1an
metal_dent[m]: you are next, please share a brief update of your progress
17:21
metal_dent[m]
sure, so we've started making the presentation on axiom beta board and remote and it'll be ready by the end of this week.
17:21
metal_dent[m]
Last week I also updated apertus wiki page and have started working on some tasks which se6ast1an assigned me
17:22
metal_dent[m]
i think that's it from me :)
17:23
se6ast1an
great, thanks - your challenge code has also been merged into the github repo - worth mentioning
17:23
Bertl
\o/
17:23
metal_dent[m]
oh yes!!
17:23
metal_dent[m]
again thank you for that :D
17:24
se6ast1an
RexOrCine1: any news from your side?
17:24
RexOrCine1
My report would be a sort of reduced version of last weeks. Should have some new stuff I wanna mention soon.
17:25
RexOrCine1
Let me check my advisory notes a second.
17:25
RexOrCine1
Wiki - Someone who knows what's going on with all aspects of AXIOM Remote should update the status on its main page as 'Nov 2018' makes things look bad. Requested 10.04.20.
17:26
se6ast1an
the C++ port is ongoing but not at the feature stage of the nov 2018 state, so not much to report to the wiki page
17:27
BAndiT1983
we will get there soon
17:27
RexOrCine1
So we can just change the date to Apr 2020?
17:27
se6ast1an
yes
17:27
RexOrCine1
OK.
17:27
RexOrCine1
The only other thing I've noted is:
17:28
RexOrCine1
No mention of Micro on apertus GitHub page.
17:28
se6ast1an
the repo is: https://github.com/axiom-micro
17:29
RexOrCine1
Yes but can we feature that somewhere on the main repo?
17:29
Bertl
note that the Power Board wiki page is still missing the PCB renders
17:29
se6ast1an
the github page is a list of "owned" repos: https://github.com/apertus-open-source-cinema
17:30
vup
I am not opposed to moving some axiom-micro repos to the apertus-open-source-cinema org and i think anuejn wouldn't either, your call
17:30
se6ast1an
I can "import" one
17:30
se6ast1an
lets see how it shows up
17:32
RexOrCine1
Nothing on my TODO list is forgotten. Unless I loose access to a computer and electricity... which almost happened this week.
17:32
se6ast1an
lets see if we can fork/import/link it without moving it until next week, if that doesnt work out we can consider moving
17:32
aombk2
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17:32
se6ast1an
I will check
17:33
vup
sure
17:33
se6ast1an
anything else RexOrCine1?
17:33
RexOrCine1
Nah that's it thanks.
17:34
se6ast1an
great, thanks
17:34
se6ast1an
vup you have any micro development news?
17:34
vup
yes
17:34
vup
Continued working on the micro r3 schematic, it should now slowly become readable:
17:34
vup
https://github.com/axiom-micro/mainboard/blob/r3/micro_rev3/micro_rev3.pdf
17:34
vup
most of the power supply stuff is done now, mostly decoupling for the ecp is left, aswell as drawing the sensor connector and the shield connector
17:34
vup
Finished the gateware for the connector test:
17:34
vup
https://github.com/axiom-micro/nGateware/blob/master/src/connector_test.py
17:34
vup
and did some preliminary tests without any connector
17:34
vup
https://files.niemo.de/freq_max_success_res_wire.png
17:34
vup
https://files.niemo.de/freq_tap_res_wire.png
17:34
vup
(see http://irc.apertus.org/index.php?day=10&month=04&year=2020 ) for more details
17:34
vup
btw the connector test gateware is also starting to show how with nmigen some nice
17:34
vup
high level abstractions can be built, like for example for simple axi accessable registers,
17:34
vup
so if anybody working on gateware has comments / feedback regarding that aspect, we would be interested.
17:35
Bertl
nice
17:36
vup
if nobody has any questions that would be it from me
17:36
se6ast1an
great, many thanks!
17:36
aombk
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17:36
Bertl
maybe you could do a short introduction to nMigen for our students at some point?
17:37
Bertl
ideally tailored to the Axiom cameras?
17:37
se6ast1an
reminder: if you want to report at this meeting and havent so far please send me a direct message (DM) now
17:37
vup
Bertl: most of the stuff we do regarding axiom cameras is still pretty much in flux, but sure
17:38
danieel
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17:38
vup
just let me know beforehand so I have a bit of time to prepare
17:38
Bertl
doesn't need to be complicated, just to get a feeling for it
17:38
Bertl
and definitely not before the students have been selected
17:38
vup
yeah makes sense
17:40
se6ast1an
right, quick updates from me and then Bertl to wrap things up
17:40
se6ast1an
Google Season of Docs application opens today.
17:40
se6ast1an
https://developers.google.com/season-of-docs/docs/timeline
17:40
se6ast1an
We will apply!
17:40
se6ast1an
new wiki extension shows dead external links - needs cronjob set up (every week?)
17:40
se6ast1an
https://wiki.apertus.org/index.php/Special:RottenLinks
17:41
se6ast1an
and of course it also needs people to maintain the pages: remove dead links or replace with new ones
17:41
se6ast1an
so that would be a great way to help in small steps, find dead link, see if it moved or is really dead and update the wiki page that lists the dead link
17:43
se6ast1an
I shifted my focus from CAD design of enclosure and accessories (I consider them good enough for now - it makes no sense to design a lot of accessories at this point without getting close to shipping actual CP enclosures soon)
17:43
se6ast1an
towards the AXIOM Remote firmware again
17:43
BAndiT1983
changed nick to: BAndiT1983|away
17:44
se6ast1an
here the goal is to port the functionality from the old (C firmware) to C++ and along the way restructure/optimize and rework most things
17:44
se6ast1an
I hope we will be at the level of the C firmware soon, its not a huge task but still requires some attention to detail
17:45
se6ast1an
metal_dent[m]: and ashok_singh[m] are already or will continue to contribute here as well I hope
17:46
se6ast1an
thats it from my side
17:46
Bertl
thanks!
17:46
se6ast1an
I also tried to invite Jan working on the emount protocol reverse engineering but he is probably busy, maybe next week
17:46
RexOrCine1
I forgot something.
17:47
RexOrCine1
Actually nah, sorry. Forget it.
17:48
Bertl
good
17:49
Bertl
so, last week we did our second GSoC applicant meeting and while not everybody had something finished, we got two reports and one was especially impressive so I'm quite optimistic for the upcoming meeting there
17:50
Bertl
just to clarify for anybody reading up about those meetings, they are basically a preparation for the GSoC tasks so that students can get started way faster than usual
17:51
Bertl
it is mostly about basic tasks, getting code formatted, setting up a build system, writing documentation, etc
17:52
se6ast1an
there is a separate gsoc channel or are the presentations happening here?
17:52
Bertl
there is a separate channel, but we might consider doing them here (let's discuss that afterwards)
17:52
flaushy
are they recorded and maybe useable for onboarding others? if yes, where can i find them?
17:53
Bertl
for now we kept the channel without logger, mainly to make it more comfortable for the applicants
17:53
Bertl
the presentations should be available as PDF slides, so making them public is probably not a problem
17:53
flaushy
fair. thanks!
17:53
vup
In theory my bouncer is keeping logs, but we should ask everybody before publishing them I think
17:54
Bertl
yes, and it probably should be anonymous :)
17:54
vup
sure
17:55
Bertl
on the infrastructure side, I've been working on a remote setup, which isn't complete yet, but hopefully will allow the GSoC students to test on real hardware efficiently
17:55
Bertl
I've completed the I/O shield for the remote-remote control (testing will be done in the next few days)
17:56
Bertl
I'll also assemble one of the new Axiom Remotes for remote testing the coming week
17:56
simonrepp
yay for remote remote control :)
17:57
Bertl
on the PCB probing side there have been quite some developments and changes to make things more usable
17:57
Bertl
the software side is still behind but we are working on that as well, but the hardware has now some nice features
17:58
Bertl
the reason why I focused on improving the hardware is that I got some reliability issues with the previous setup and it was somewhat tricky to position
17:59
Bertl
we need a high resolution microscope style camera to get the position correct, but it is not really feasible to use the same camera for monitoring the probe pin without sacrificing the precision part
18:00
Bertl
so I had the idea to use a raspberry pi zero with camera for monitoring the probe pin
18:00
Bertl
this resulted in a number of mechanical designs and different ways to attach the pizero with camera to the moving probe head
18:01
Bertl
this also resulted in a change of the PIC interface
18:02
Bertl
i.e. I thought: why not attach the PIC directly to the pizero instead of having a separate cable
18:03
Bertl
there also is a nice package to program PICs from the RPi (pickle) so I completely switched to this design
18:03
se6ast1an
let me know if you need any cad designs for that still
18:03
Bertl
the cad parts are tricky but they are basically finished except for one tiny part which I just realized we will still need
18:04
Bertl
in the final version, when we have a custom PCB, we will simply plug the pizero into that PCB making all the necessary connections
18:04
Bertl
basically getting rid of all the mechanical parts connecting it now to the base
18:04
Bertl
I'll upload a view pictures later, didn't get to taking them yet
18:05
Bertl
the rpi is only connected via two power wires and transmits all the data via wifi
18:05
Bertl
so it basically does the rpi camera stream and the probing stream
18:06
Bertl
and in the future it might also control the mechanics as well
18:07
Bertl
the camera is streaming h.264 with about 20 FPS over wifi at 1280x960 which is reasonably good (I'll upload an image as well)
18:07
Bertl
the only remaining problem there is that the camera is mechanically oscillating in the air stream from the fan so the image is wobbling at the moment
18:08
Bertl
(this is the one part which still needs to be added :)
18:08
Bertl
so with BAndiT1983 basically finished with the pad extraction it should be a matter of a day or two adjusting the software side to do actual probinh
18:08
Bertl
*probing
18:09
Bertl
I've done some manual probes with the setup and the results are quite promising
18:09
Bertl
finally, we (read se6ast1an :) discovered a very interesting piece of hardware
18:10
Bertl
the AVnet Ultra96-V2 'board'
18:10
Bertl
https://www.avnet.com/opasdata/d120001/medias/docus/198/5365-pb-ultra96-v2-v10b.pdf
18:10
se6ast1an
overview: http://zedboard.org/product/ultra96-v2-development-board
18:11
Bertl
this is basically a Xilinx Zynq UltraScale+ based board which has mini display port, several USB 3 and USB 2 ports and some high speed interfaces from the FPGA side
18:12
Bertl
kind of similar to the MicroZed except for the PS side MGTs for the USB 3.x
18:12
danieel
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18:13
Bertl
now we've considered using various NUCs and small format computers as recorders for the Axiom Beta
18:13
Bertl
but there is always the problem of transferring the raw data between Axiom Beta and the recorder in an efficient way
18:14
Bertl
which in this case can be reduced to a direct LVDS connection between Axiom Beta and the Ultra96 board
18:14
Bertl
or if you want to have a larger distance, utilizing one of the dual 10G transmitters over USB cable or similar
18:15
vup
very interesting board, but no built transceivers :(
18:15
Bertl
no PL side MGTs
18:15
Bertl
but 4 PS side MGTs
18:15
vup
yes thats what i meant
18:15
Bertl
so yes, it would be nice to have those on the PL side as well
18:16
Bertl
but assuming the USB works reasonably well (e.g. with an attached USB storage)
18:16
Bertl
this would already be an interesting recording solution
18:17
Bertl
and the price is very similar to the MicroZed
18:17
vup
the zynq itself also has pcie, right?
18:17
Bertl
so, we decided to order one and do some testing with it
18:17
vup
do you know if / how it is broken out on the board?
18:17
vup
(could maybe be used for m.2)
18:18
Bertl
yes, schematics are here: https://www.avnet.com/opasdata/d120001/medias/docus/193/Ultra96-V2%20Rev1%20Schematic.pdf
18:19
Bertl
one lane is on the Micro A/B
18:19
Bertl
two lanes on the mini-dp
18:20
vup
hmm i see
18:20
Bertl
and one lane on the USB 3.1 hub
18:22
Bertl
so that's basically it from my side ...
18:22
se6ast1an
great, many thanks
18:22
se6ast1an
lastly I want to ask everyone what good entra
18:22
se6ast1an
nce tasks for new team members or people interested in the project looking to contribute could be
18:23
se6ast1an
beside the gsoc tasks
18:23
se6ast1an
maybe more focused on documentation, cad design, creative tasks
18:24
se6ast1an
anything that can push the project forward basically
18:24
se6ast1an
maybe we can collectively think about that until next weeks meeting
18:24
se6ast1an
if nobody has anything to add -> meeting concluded
18:24
se6ast1an
many thanks everyone!
18:25
Bertl
here is an image from the pizero live stream: http://vserver.13thfloor.at/Stuff/AXIOM/PROBE/pizero_probe.jpg
18:26
vup
yes, great meeting everybody!
18:26
vup
-> afk
18:33
simonrepp
i'm off, thanks for the meeting also from my side!
18:34
Bertl
yeah, off for now as well ...
18:34
Bertl
changed nick to: Bertl_oO
18:34
simonrepp
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18:46
flaushy
I am wondering for students with limited budget, what would be a good starting point to even work on real hardware? Is axiom micro a good way into it?
18:50
se6ast1an
there is this: https://wiki.apertus.org/index.php/AXIOM_Beta_Remote_Access
18:51
flaushy
yeah, i wonder tho whether this would be the best way for random people to test and do stuff. especially if you are rather inexperienced in some aspects
18:52
flaushy
so having your own hardware you might brick sounds to me like a better solution, but going full in in multi k invest is another thing.
18:55
BAndiT1983|away
changed nick to: BAndiT1983
18:57
omar31
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19:04
se6ast1an
agreed :)
19:05
se6ast1an
building the micro is not an easy start either though I am afraid...
19:14
se6ast1an
working on the AXIOM Remote hardware is simpler/cheaper if you are interested in contributing on that front
19:15
anuejn
Bertl: is the UltraScale+ based board intended to be used in addition to the microzed or instead of it?
19:17
se6ast1an
in addition
19:17
anuejn
Ah okay
19:17
se6ast1an
connected to each other over direct LVDS lnks
19:17
se6ast1an
through the plugin module slots
19:18
anuejn
I just want to say that i have concerns regarding the added extra complexity
19:18
flaushy
so probably finding some other project to gain some insights for learning the basics might be good, and picking up other tasks here might be useful
19:18
se6ast1an
please elaborate, because I consider this approachs main advantage in its extremely low complexity :)
19:18
se6ast1an
flaushy: depends on what you want to do exactly
19:19
se6ast1an
soldering, building hardware, software development, etc.
19:19
anuejn
Maybe it is not too bad but having to write gateware and software for another fpga soc seems not too easy
19:19
anuejn
But maybe it can share a lot of things with the beta
19:20
se6ast1an
thats the beauty, USB3 is connected to the OS/Linux
19:20
se6ast1an
no gateware reqired
19:20
se6ast1an
and xilinx drivers are available
19:20
anuejn
Yes but you have to move the data _to_ the os
19:21
se6ast1an
yes
19:21
anuejn
But that might be not too much work
19:22
se6ast1an
thats what I hope as well
19:22
anuejn
On the other hand we have a similiar problem if we develop an fpga based plugin module (ie. for usb3)
19:22
se6ast1an
so overall I think its a rather low effort approach
19:22
anuejn
We will see
19:23
se6ast1an
yes, but you do not need to deal with the fpga side of USB3
19:23
anuejn
Thats true
19:23
anuejn
Only with the fpga side of axi hp
19:24
flaushy
se6ast1an: mostly direct FPGA video work, playing with certain aspects etc pp so having sensors + fpga is a nice thing. but: explore the domain as well. Not (yet) interested in super high quality output. But nevertheless working on "real" hardware has its charme. I am not aware of too many video projects with fpgas (zynq et al) as well.
19:25
se6ast1an
I see, maybe Bertl_oO can suggest something?
19:26
se6ast1an
another benefit of the ultra96 in my opinion is that we can benchmark the USB3 write speeds without writing any gateware, install linux, plugin storage media, run benchmark
19:26
se6ast1an
once we verified the datarates are sufficient we can pursue this further
19:27
se6ast1an
in contrast to the usb3 mdoule with the ftdi chip which turned out to have bandwidth issues after a lot of effort went into development
19:42
anuejn
I see
20:18
Spirit532
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20:21
Bertl_oO
flaushy: for FPGA based video processing you are probably best off with an FPGA board of your choice with either HDMI in/out (many provide this up to full HD) or with a mezaanine connector and some HDMI in/out board
20:21
Bertl_oO
this way you can use your favorite HDMI source (computer, dvd-player, game-console) and do processing on the video data in realtime with output to a monitor
20:23
Bertl_oO
the snickerdoodle, the ZYBO or the PYNQ Z2 have this and cost around 150 EUR
20:24
Bertl_oO
(those are zynq based, so you have a hard CPU for Linux there as well)
20:24
Bertl_oO
if you do not need an SoC, you can go for the miniSpartan6+ which costs less than 100 EUR and has two HDMI ports as well
20:26
Bertl_oO
hope this helps ...
20:44
flaushy
Bertl_oO: thanks
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BAndiT1983
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megora
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megora_
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futarisIRCcloud
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