Current Server Time: 07:57 (Central Europe)

#apertus IRC Channel Logs

2017/07/12

Timezone: UTC


00:12
arpu
left the channel
00:14
arpu
joined the channel
00:18
pusle
left the channel
01:14
illwieckz
left the channel
01:28
illwieckz
joined the channel
02:12
jucar
joined the channel
02:17
Rex0r
left the channel
03:15
jucar
left the channel
04:55
toxitobi
left the channel
05:48
sunxi_fan1
joined the channel
06:13
sunxi_fan1
left the channel
07:16
pusle
joined the channel
08:02
davidak
joined the channel
09:12
se6astian|away
changed nick to: se6astian
09:19
Bertl_zZ
changed nick to: Bertl
09:19
Bertl
morning folks!
09:25
pusle
left the channel
09:32
se6astian
changed nick to: se6astian|away
09:41
dimaursu16
left the channel
09:49
se6astian|away
changed nick to: se6astian
09:51
dimaursu16
joined the channel
09:51
dimaursu16
left the channel
09:51
dimaursu16
joined the channel
11:15
pusle
joined the channel
11:53
RexO
left the channel
12:41
TD--Linux
joined the channel
12:41
TD-Linux
left the channel
13:57
jucar
joined the channel
14:45
jucar
left the channel
15:05
se6astian
changed nick to: se6astian|away
15:14
Spirit532_
changed nick to: Spirit532
15:21
RexOrCine
joined the channel
15:47
davidak
left the channel
16:01
se6astian|away
changed nick to: se6astian
16:52
TD--Linux
changed nick to: TD-Linux
16:52
TD-Linux
left the channel
16:52
TD-Linux
joined the channel
17:18
arpu
left the channel
17:31
felix_
Bertl: can you point me to the library with the dual axiom beta pcie-style connector (the card edge side, not the slot side)
17:31
Kjetil
How's the SDI card progressing?
17:32
Kjetil
If you don't mind me asking
17:33
Bertl
felix_: http://vserver.13thfloor.at/Stuff/AXIOM/BETA/axiom_beta_plugin_module_3xmDP_v1.2_r1.4.{brd,sch} is probably the best starting point
17:33
felix_
Kjetil: well, we desicussed things last week, and i'll probably design the mechanical dummy this week. the work on the hdl code of the sdi interface will begin in september
17:34
felix_
Bertl: hm, so there is no real library for that connector? :/
17:34
Bertl
the library can be extracted from the design
17:34
Bertl
but I can also upload it separately if that helps you :)
17:35
felix_
yeah, that would be easier for me
17:35
Kjetil
SDI isn't all that complex if you limit the scope to HD/3G-A
17:36
felix_
yep. we'll probably support hd, 3g and 6g
17:36
Kjetil
I haven't looked at the 6G standards. But if it is anything like the 12G standard it is multiplexing hell
17:37
felix_
we won't support 12g, since only the kintex chips in the huge packages support up to 12gbit/s on their transceivers
17:37
Bertl
felix_: http://vserver.13thfloor.at/Stuff/AXIOM/BETA/PCIe.lbr
17:37
Bertl
note that you still need the board frame and placement to get it right
17:39
felix_
thx
17:39
felix_
ok
17:42
Kjetil
Are you planning to use 6G for 4k 4:2:2 or for 2K 4:4:4 ?
17:42
felix_
haven't really planned that to be honest
17:43
Kjetil
both it is ? :P
17:44
felix_
we'll see ;)
17:44
Kjetil
I guess the output portion is the same regardless
17:45
Bertl
if it is easy enough, I'm sure you can add it yourself, no? :)
17:45
Kjetil
what? Is this like open source or something?
17:45
Kjetil
:)
17:46
Bertl
sure looks like ... but let me check the site *G*
17:47
felix_
i'll design it in an extensible way
17:47
Kjetil
My work here is done. I have succeeded in making the job a bit harder :P
17:50
Kjetil
But yeah.. I might be of some assistance if you need it. I have a bit of experience with SDI and verifying SDI hardware.
17:50
felix_
the extensibility was always a design goal
17:50
felix_
Kjetil: sounds good :)
20:18
BAndiT1983|away
changed nick to: BAndiT1983
21:00
sunxi_fan1
joined the channel
21:35
se6astian
off to bed
21:35
se6astian
good night
21:35
se6astian
changed nick to: se6astian|away
21:45
BAndiT1983
changed nick to: BAndiT1983|away
22:35
alexML
left the channel
22:35
alexML
joined the channel
22:41
sunxi_fan1
left the channel
22:58
dimaursu16
left the channel