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16:00 | se6astian_ | MEETING TIME, who is here today?
| 16:00 | Bertl | is here
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16:01 | se6astian_ | great, any news Bertl?
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16:01 | Bertl | yes, I have something to share today :)
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16:02 | se6astian_ | hurray!
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16:02 | se6astian_ | go ahead
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16:03 | Bertl | so, I'm currently investigating the options we have for a flash less rp2 (pico) setup
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16:04 | Bertl | i.e. how to properly boot and run an rp2 (rp2040 currently) without flash (and also without crystal) from another rp2
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16:05 | Bertl | and it currently seems we have two options there, one is via SPI (kind of emulating the flash memory) and the other is via SWD (basically remote programming the device)
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16:06 | Bertl | while I think that SWD is probably the best way to go, I wanted to see whether the SPI route is feasible and how much code/work is required to get that working
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16:07 | Bertl | for the SPI case, we need at least four wires between the RP2s, CLK, MISO, MOSI and CS#
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16:08 | Bertl | the flash less device then uses the rom code (bootrom) to load a second stage bootloader via SPI (normally from flash) which normally then continues with faster QSPI (at least six wires) XIP executing code from flash memory in place
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16:09 | Bertl | note that we cannot reasonably use XIP in our case as that would require permanently answering requests from the device
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16:10 | Bertl | so the best approach here is to emulate just enough to get the second stage bootloader running (boot2) and then switch to something custom to load more data into RAM
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16:11 | Bertl | and that is basically what I did in a proof of concept setup wher a flash and crystal less device is booted from a 'normal' pico setup (with flash and oscillator) via 4-wire SPI
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16:12 | Bertl | http://vserver.13thfloor.at/Stuff/PICO/custom_boot2_spi_min.tar.zstd
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16:12 | Bertl | the example ends with boot2 running some code flashing an LED on the target
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16:13 | Bertl | turns out, this isn't very complicated at all, but has some potential drawbacks compared to the SWD setup
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16:14 | Bertl | first, we need at least four wires to make this work properly (compared to two wires for SWD)
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16:15 | Bertl | then, to get more data over the connection, we need to program the SSI (the (Q)SPI peripheral) to use a higher clock rate and ideally DSPI (dual spi)
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16:15 | Bertl | and all that has to somehow fit into 240 bytes of code ;)
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16:16 | Bertl | another disadvantage is that all data needs to be 'requested' from the flash-less device, and the other RP2 has to 'respond' to those requests
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16:16 | Bertl | which limits the maximum speed at which this can happen
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16:17 | Bertl | on the plus side, the boot2 bootup happens in less than 8ms and doesn't require anything special from the flash-less device
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16:18 | Bertl | and the SSI (QSPI) gpios are not used anyway, so no precious GPIOs are required for this setup
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16:19 | Bertl | that said, I will next look at the SWD alternative and check how much needs to be done to get that working
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16:19 | Bertl | that's it from my side for today!
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16:21 | se6astian_ | So I as layman understand whats going on, the issue is that normally each rp2 needs a flash memory chip attached right?
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16:21 | se6astian_ | and to only have one instead of 2 flash chips when using two rp2 chips you undertook this adventure?
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16:21 | Bertl | yes, the rp2 is designed to 'boot' from either USB or a 'flash' memory of some kind
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16:23 | Bertl | indeed, as the flash memory uses up the same space as the rp2 and usually costs more than the microcontroller
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16:23 | Bertl | and still needs to be programmed somehow, so when changing the code for an rp2
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16:23 | se6astian_ | cost is not really an issue though is it, a few $ here and there?
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16:23 | Bertl | we need to somehow
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16:23 | Bertl | 'reprogram' it
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16:23 | Bertl | either via a separate USB or SWD connection
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16:24 | Bertl | or via some extra bootloader which can reprogram the flash (fragile setup)
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16:24 | Bertl | so for simple tasks, like for example watching buttons and dials and controlling LEDs
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16:25 | Bertl | it complicates things unnecessarily to have this flash and maintain/program/update it
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16:25 | se6astian_ | but whats the problem with just having 2 rp2s and 2 flash chips?
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16:25 | Bertl | ^^ what I just wrote above
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16:26 | se6astian_ | 2x usb required?
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16:26 | Bertl | for example
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16:26 | se6astian_ | right, I see
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16:26 | Bertl | and you need to program each one separately on an update
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16:27 | Bertl | if we decide to go with 3 RP2s because they are cheap
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16:27 | Bertl | we end up with three USB connectors or three SWD headers
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16:27 | Bertl | and you need to keep all of them in sync
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16:27 | se6astian_ | all clear now
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16:28 | se6astian_ | the size of the flash memory can be decided when choosing a chip so storing the firmware for n rp2s is no issue I assume
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16:28 | Bertl | yes, the main RP2 needs to have a flash and store the code for all the slave devices
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16:29 | Bertl | which should not be a big problem as the code on those is probably quite small
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16:30 | Bertl | and this then allows to do a single update via the USB interface we need/want anyways
| 16:31 | anuejn | is here
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16:31 | Bertl | at boot, the master RP2 distributes the code to the slaves and then ideally communicates over the same channels
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16:32 | se6astian_ | it require though to compile the MCU code for each rp2 and package everything together into some custom firmware image then for flashing right?
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16:32 | Bertl | yes, this is also already done in the SPI example
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16:32 | se6astian_ | does this affect the hardware debugging capabilties in some way?
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16:32 | se6astian_ | I see
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16:33 | Bertl | i.e. it builds the custom boot2 firmware and incorporates it into the flash image for the master
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16:33 | se6astian_ | or is hardware debugging a seperate set of pin outs anyway for a development prototype?
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16:33 | Bertl | debugging usually happens over SWD, so that would be separate in the SPI case and would be a header to attach a pico probe
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16:34 | Bertl | in case we decide to use SWD for 'booting' the slaves, we would still have the SWD headers for debugging
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16:34 | Bertl | they would just be dual use and you want to disable the SWD upload on the master in the debug case
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16:35 | anuejn | Bertl: could we have an upgrade procedure in which the main pi programs the other ones via swd?
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16:35 | anuejn | or have some kind of bootloader?
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16:36 | Bertl | yes, that was my original suggestion
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16:36 | anuejn | i see
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16:36 | Bertl | note here, the bootloader (first stage) is fixed in the boot rom
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16:36 | se6astian_ | Sounds good!
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16:36 | Bertl | i.e. we cannot change that on any currently available RP2
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16:37 | Bertl | and to complicate things, there are 3 different version of that bootcode available
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16:37 | anuejn | yeah but we could factory program our second stage bootloader?
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16:37 | Bertl | into what?
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16:37 | anuejn | into the peripheral chips
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16:38 | Bertl | only if they have a flash memory
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16:38 | anuejn | yeah
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16:38 | Bertl | (this is what I mentioned as fragile setup above)
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16:38 | Bertl | i.e. if you manage to wipe the bootloader
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16:38 | anuejn | I would definitely give them flash - everything else seems a bit like asking for trouble
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16:38 | Bertl | why do you think so?
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16:39 | anuejn | okay - how about using usb to program the other chips?
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16:39 | Bertl | -> axiom remote with 3 USB ports?
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16:39 | anuejn | and having a programming firmware in which the main chip acts as a host
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16:39 | Bertl | only one of them is the correct USB port :)
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16:40 | anuejn | I mean for development that would probably the easiest option
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16:40 | Bertl | ah, internal USB connections to each chip
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16:40 | Bertl | and bit banging USB from the master?
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16:40 | Bertl | I considered that, but it seemed even more complicated than SWD :)
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16:40 | anuejn | that is true
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16:41 | Bertl | especially as the USB bootloader does a full disk emulation
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16:41 | Bertl | and you have to 'write' the file to the disk
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16:41 | Bertl | (i.e. USB storage medium)
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16:41 | anuejn | yeah that sounds like a bunch of work
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16:42 | Bertl | anyway, the main purpose was to figure out whether SPI booting is possible
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16:42 | se6astian_ | well done!
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16:42 | Bertl | and the proof of concept code shows that it can be done
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16:42 | se6astian_ | anuejn: any news from your side?
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16:42 | anuejn | I would actually do the 3 usb solution for initial development and then come up with something better once all other yaks are shaved
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16:42 | se6astian_ | how is the reverse engineering image sensor going?
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16:42 | anuejn | but I see that this is a nice and hairy yak :D
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16:42 | Bertl | I switched from USB to SWD pretty fast
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16:43 | Bertl | (for development)
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16:43 | anuejn | I see
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16:43 | anuejn | sounds reasonable
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16:43 | Bertl | as USB always requires pressing keys and/or unplugging stuff and uploading files
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16:43 | Bertl | while SWD can be done with openocd in seconds
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16:44 | Bertl | (for development that is, via pico probe)
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16:44 | anuejn | okay did not want to interfere, you seem to be up to something :)
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16:44 | anuejn | sounds good
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16:45 | anuejn | I actually also thought about building a system with multiple rp2035 chips:Â a 2d5 to mipi converter
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16:45 | se6astian_ | please share! :D
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16:45 | anuejn | one for timing generation and one for "datapath" (adc to mipi csi)
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16:46 | anuejn | someone made a demo of using the rp2035 to output mipi dsi to a raspberry pi and that might be a cheaper option than using an fpga
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16:46 | Bertl | I presume you refer to the rp2350
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16:47 | anuejn | but its very unclear if it would work and I dont actually think that I would enjoy writing the firmware for that so I kinda shelved the idea for now
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16:47 | anuejn | Bertl: err yes :D
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16:47 | anuejn | I actually spend most of my time writing on my thesis -Â If anyone feels like commenting on it, you are very welcome
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16:48 | anuejn | it is not very technical tho - mostly kinda adjacent theory because of uni requirements
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16:48 | Bertl | is there a link somewhere?
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16:50 | anuejn | ill share it in private
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16:50 | se6astian_ | sure, I guess I can have a look, not sure if I can provide any valuable feedback though like an art professor would ...
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16:51 | anuejn | moreover there I spend a bunch of time trying to get liteeth to work to stream adc data to my computer
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16:51 | Bertl | nice, was that successful?
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16:51 | anuejn | that was a bit frustrating because liteeth on my ecp5 board is flaky for some reason and unrelated hdl changes break the eth core -Â even if it is passing timing
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16:52 | anuejn | so now I am a bit in crisis and re-evaluating my options for getting the data fast enough to a computer
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16:53 | Bertl | ouch, did you try fixing the netlist placement?
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16:53 | anuejn | I am unsure if thats possible with nextpnr
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16:53 | anuejn | so no
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16:54 | anuejn | maybe Ill try to use my previous board revision with the zynq just for the ADC and the ecp5 for timming generation
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16:54 | anuejn | anyways... thats it from my side
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16:55 | anuejn | ah and if you know any CMOS image sensors with analog outputs that would be highly interesting to me
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16:56 | anuejn | I dont know the output impedance of the signals and am completely unexperienced in analog design so it would be cool to see what others have built in the past
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16:56 | se6astian_ | are there any CMOS (not CCD) sensors with analog signals?
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16:57 | anuejn | yeah
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16:57 | anuejn | for example almost every canon sensor ever made (up until a few years ago)
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16:58 | Bertl | I think the CMV12K can also output analog data, but it is only for test purposes
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16:58 | anuejn | I believe they did not have the in house talent /Â semiconductor processes to make nice ADCs so they always (?) used customized Analog Devices parts for off chip digitization
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16:58 | Bertl | i.e. you can map a signal to one of the test pins with some magic register settings
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16:59 | anuejn | (c.f. https://magiclantern.fandom.com/wiki/ADTG)
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16:59 | anuejn | Bertl: cool, I did not know that -Â thanks
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16:59 | Bertl | well, there are (some) benefits to an external ADC
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17:00 | se6astian_ | very interesting!
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17:01 | anuejn | and... loads of downsides :D
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17:01 | se6astian_ | anyone else who wants to report in the traditional meeting framework?
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17:02 | se6astian_ | BAndiT1983: you around?
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17:05 | se6astian_ | OK then, thanks Bertl and anuejn! MEETING CONCLUDED
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17:05 | se6astian_ | feel free to dive deeper and continue the discussion though!
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18:50 | felix_ | on using a raspberry pico without flash: have you looked at the rp2350 instead of the rp2040? rp2350 has a uart boot mode which the older rp2040 doesn't seem to have
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20:11 | anuejn | oh that sounds cool
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20:41 | Bertl | felix_: yeah, but currently the rp2350 is not really available as chip ... we are also very interested in the B variants as well as the rp2354 with flash
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20:41 | Bertl | but good point, I should test the UART boot
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