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| 17:00 | se6astian | MEETING TIME, who is here?
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| 17:00 | Bertl | is here
| | 17:00 | se6astian | Great, any news?
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| 17:00 | se6astian | You mentioned some HDMI news recently?
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| 17:00 | Bertl | yes, there are some news worth sharing today
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| 17:01 | se6astian | Wonderful!
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| 17:01 | Bertl | the background here is that we know that our HDMI is somewhat incomplete or maybe even incorrect and this causes some devices to behave a little weird
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| 17:02 | Bertl | the main problem here is that we do not have access to the 'raw' HDMI data, i.e. the TMDS encoded symbols
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| 17:04 | Bertl | so we spend some thought on how to capture this data, which is typically high speed data (think Giga Hertz) in Current Mode Logic and thus cannot be simply captured with any logic analyzer
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| 17:05 | Bertl | to work around this, I've been developing a few breakout boards and electronic circuits which can help capture this data easier
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| 17:06 | Bertl | while doing so and testing some of those, I though to myself, it all would be way easier if we could slow down a 'known good' signal enough to easily capture it with reasonable quality
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| 17:07 | Bertl | this lead me to test a few options with several devices where I could define HDMI modes myself (think xrandr) and I found that the raspberry pi can go quite low with the HDMI clock
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| 17:08 | Bertl | normally HDMI uses around 150MHz and can go down to 25MHz or so on 640x480 but that still means that the data is sent at 10 times the speed
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| 17:09 | Bertl | but fortunately the RPi can easily go down to 2MHz on the HDMI clock which makes the data itself around 20MHz
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| 17:10 | Bertl | now this is quite easy to capture with a logic analyzer that can handle arbitrary voltage levels, which my rigol mso fortunately does
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| 17:10 | Bertl | just to recap here, the idea is to compare a known good HDMI with 'our' HDMI output and figure out where we are going wrong
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| 17:12 | Bertl | so the next step was to reconstruct the actual 10bit data from the logic analyzer capture, further analyze and interpret the data and finally decode all the information making up the HDMI signal including the very important data islands
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| 17:12 | Bertl | add a simple visualization and we are ready to compare signals
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| 17:13 | Bertl | I've spent most of last week on getting all that done and having a proper test setup here and while I didn't manage to compare the signals yet, I managed to capture and interpret the 'known good' signal from the RPi
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| 17:14 | Bertl | an example can be found here: http://vserver.13thfloor.at/Stuff/AXIOM/HDMI/
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| 17:14 | Bertl | where the interesting parts are probably the PNG images of the decoded and interpreted frames and the TXT elaboration on the frame analysis
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| 17:16 | Bertl | the code for decoding the binary data as captured by the logicanalyzer will be available shortly and if all goes well, I'll be capturing the Axiom output in the next few days for comparison
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| 17:17 | Bertl | note that this will allow us to fine tune and tweak the HDMI output in a way that we can be pretty sure to generate compliant HDMI output in the near future
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| 17:18 | Bertl | also note: once the PCBs are complete and assembled, we should be able to improve on the capture side and get higher frame rate captures as well
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| 17:18 | Bertl | that's it from my side for today.
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| 17:19 | se6astian | Very cool
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| 17:20 | se6astian | And the power adapter PCB delivery has also arrived?
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| 17:20 | Bertl | probably, haven't collected the package yet
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| 17:21 | se6astian | Ah ok
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| 17:22 | se6astian | Anyone else with news to share?
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| 17:26 | se6astian | Quick update from me: for ordering the power connector PCB still waiting for Oscars feedback about sending the payment
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| 17:26 | se6astian | Ok then, thanks bertl! MEETING CONCLUDED
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| 17:27 | Bertl | thanks for the moderation se6astian!
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