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#apertus IRC Channel Logs

2020/11/11

Timezone: UTC

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BAndiT1983|away
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Bertl_zZ
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07:23
Bertl
morning folks!
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anuejn
morning :)
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10:35
vup
_florent_: awesome work with https://github.com/enjoy-digital/litesata_axiom :)
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10:36
vup
though one question, what is the reason for not supporting gen3? the fpga should be speedgrade -2 and thus should be able to do gen3?
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14:14
Bertl
off for now ... bbl
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Bertl
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16:23
_florent_
vup: thanks, it should indeed be possible to support gen3 on Artix7 but i haven't validated it, i'll try to work on this in the next weeks, for now gen1/gen2 are possible on Artix7 and gen1/gen2/gen3 on Kintex7.
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vup
_florent_: I see, awesome work nonetheless
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BAndiT1983
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BAndiT1983|away
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19:34
anuejn
Bertl_oO: is there any specific trick you use to reset the axi hp ports?
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Bertl_oO
reboot
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19:49
anuejn
hm... okay
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19:49
anuejn
isnt there anything that can be done to get rid of outstanding transmissions?
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Bertl_oO
nothing I could figure out so far, it seems that the PS side needs to be reset to flush any outstanding AXI transactions
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