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| 02:37 | LurkUpTable | Hey, guys! Have you seen that Craft Camera? (http://www.craftcamera.com)
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| 02:40 | LurkUpTable | May be interesting to analyze their modular design to expand ideas for the Gamma?
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| 03:12 | Spirit532 | Aw, he quit before I could tell him the truth
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| 03:51 | Bertl_zZ | changed nick to: Bertl
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| 03:51 | Bertl | morning folks!
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| 03:52 | Bertl | well, it's not the first time somebody falls for it and it won't be the last time
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| 06:31 | se6astian | good morning
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| 09:15 | RexOrCine | LurkUpTable is a good name.
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| 09:17 | se6astian | indeed :)
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| 10:32 | Napejts | huhu
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| 11:38 | se6astian | please help us find interesting image sensors for the future and add them to this table: https://wiki.apertus.org/index.php/Image_Sensor_Table
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| 14:08 | Dan1 | hello sebastian
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| 14:08 | se6astian | hello sebastian!
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| 14:12 | Bertl | hello se6astian! :)
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| 14:13 | se6astian | hello Bertl!
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| 14:15 | Bertl | hello Dan1!
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| 14:17 | Dan1 | Hello Bertl
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| 14:38 | Bertl | off for now ... bbl
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| 14:38 | Bertl | changed nick to: Bertl_oO
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| 15:14 | se6astian | gotta go
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| 16:28 | Guillaume_Chooks | off for holidays few days... 8h of road now ! Sebastian, send me an email when you receive 3d print parts, hope nothing will be broke !
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| 16:34 | techydude | hey @Bertl_oO , VCCIO_34 & _35 on Zynq are 2.5V, but VCCIO on MachX02 is 3.3, right? Doesn't that mean the SPI bus (repurposed from the 2 LVDS pairs) between the two is mismatched? (SDI from Mach to Zynq is over-driving 3.3 into 2.5, and SDO, SCK & SPI_EN from Zynq to Mach is under-driving 2.5 into 3.3, where Vhi threshold for Mach is 2.0, so only 500mV margin)?
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| 16:40 | Bertl_oO | techydude: the communication between Zynq and MachXO2 is designed to run over LVDS
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| 16:43 | Bertl_oO | so yes, the current (software) solution is out of spec, unless you change the RF IO voltages to 2.5V
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| 17:29 | Bertl_oO | techydude: see irc log
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| 17:41 | techydude | if by "software" you mean the SPI master in Zynq VHDL, and VHDL in the MachX02 to wire that SPI right across to the Sensor's SPI, then yes. So what voltage are you running SH_SE_VIO (aka RFE_V) at currently? Wiki (https://wiki.apertus.org/index.php/AXIOM_Beta_Software) suggest 3.3V......
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| 17:43 | Bertl_oO | yes, but as I said, the communication between Zynq and RFE is designed to be LVDS ... John_K had somebody work on that IIRC
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| 17:43 | Bertl_oO | and for LVDS, the IO voltage does not matter, as long as the pins are configured correctly
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| 17:49 | sebix | changed nick to: niemand
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| 18:02 | techydude | He's still working on it, once it's in a public-facing state you'll be the first to know :), but his modular appraoch is to first emulate the SPI i/f to Zynq, then later it can be replaced by LVDS.
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| 18:03 | techydude | so what V have you currently got SH_SE_VIO set to?
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| 18:03 | Bertl_oO | 3.3V
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| 20:59 | se6astian | I am off to bed
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| 21:30 | se6astian | changed nick to: se6astian|away
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