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#apertus IRC Channel Logs

2015/05/10

Timezone: UTC


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Bertl_zZ
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13:44
Bertl
morning folks!
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se6astian|away
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15:50
se6astian
good afternoon
15:50
mars_
morning se6astian
15:52
philippej
hello here, long time no see !
15:53
se6astian
indeed, where have you been? :)
15:53
se6astian
Malte is organizing the Vienna participation in https://oscedays.org/
15:53
philippej
I was in the real world, almost exclusively :)
15:53
se6astian
its basically a hackaton about circular economy open source topics
15:53
philippej
how is it going here ?
15:54
se6astian
and we can participate, like define a challenge/goal to solve
15:54
se6astian
what is the real world? never heard of it before....
15:54
philippej
great !
15:55
philippej
you probably never met the guy with those red and blue pills
15:56
se6astian
I am a pill vegan :)
15:56
se6astian
so we need ideas for the OSCE
15:56
se6astian
one idea I had was that we could make the camera API the challenge to solve/develop
15:57
se6astian
but the event should focus very much not just on open source but also on circular economy topics
15:57
se6astian
which is quite difficult to incorporate in our topics...
15:57
se6astian
of course we are all for recycling, reusing, modularity, but how to turn that into a challenge to work on together in those few days
15:58
se6astian
so ideas welcome :)
16:00
philippej
reading the site
16:04
Bertl
I think we only match the "open source hardware" and "maintain/repair" part
16:05
Bertl
so I would suggest to put the focus on that, maybe work on testing the boards and parts and documentation for repair?
16:07
se6astian
but how do you do that with people who we cant expect to have indepth electronics know how?
16:07
Bertl
what do we know about the people who will work on "our" project?
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philippej
do we need to propose a specific project?
17:03
philippej
you can already bring our experience to the table
17:03
philippej
another option would be to use the camera for some specific use
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17:34
philippejadin
me again, is there some place that explains the whole image processing pipeline in details? It's on the wiki, but I have some questions :-)
17:35
Bertl
ask if you have questions :)
17:36
philippejadin
here : https://wiki.apertus.org/images/c/cc/Image01.png
17:37
philippejadin
if I understand correctly, there is sensor -> fpga -> memory -> fpga -> hdmi encoder ?
17:37
philippejadin
with the second fpga pass used to transform raw image into something that is useable by the hdmi encodder
17:38
Bertl
https://wiki.apertus.org/index.php?title=AXIOM_Alpha_Software
17:38
Bertl
here with more detail
17:39
philippejadin
yes that's the page I'm using
17:39
philippejadin
am I correct with the fpga-> memory -> fpga -> hdmi thing ?
17:40
Bertl
those are separate pathes, but yes
17:40
Bertl
sensor -> fpga -> memory
17:40
Bertl
memory -> fpga -> hdmi encoder
17:41
philippejadin
the fpga writes to ram the processed "raw" image, then reads it in another part to debater, etc. ?
17:41
philippejadin
(debayer)
17:41
philippejadin
then I'm wondering what the shuffle part means
17:45
Bertl
the shuffle part is to reorder nibbles and bytes to match the various encoder requirements
17:45
Bertl
on the AXIOM Alpha, we use the very unfortunately connected Analog Devices HDMI chip, which has certain requirements what lanes contain what color information
17:46
philippejadin
thanks!
17:46
philippejadin
and the cdc inside the hdmi encoder?
17:46
Bertl
and with every change to the mode in the AD chip, we need to shuffle the bits around
17:46
philippejadin
csc, sorry
17:46
Bertl
that is basically a simple 3x3 matrix which allows for color correction inside the AD chip
17:46
Bertl
or color conversion that is
17:47
philippejadin
maybe it' already too specific to alpha to explain the basic pipeline
17:48
philippejadin
out of curiosity, the interpolation adds some bits for hdmi ?
17:48
Bertl
we will have a similar pipeline on the Beta, but we will remove some components (like the shuffle), add others (like the TMDS encoder) and slighly adapt/modify the rest
17:48
se6astian
philippej: do we need to propose a specific project? <- it should be a meta task (for an city planning hackaton it was "plan a school")
17:49
philippejadin
Bertl, thanks for the clarifications !
17:49
Bertl
as we can not transfer full pixel data to the AD HDMI encoder (because of the unfortunate wiring) we have to send 4:2:2 format, which requires interpolation
17:49
philippejadin
ok
17:50
philippejadin
se6astian: we could find a project that requires some kind of imaging, but I don't really see what it could be. Maybe something that involves computer vision and some big data powder on top of it :-)
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Bertl
off for now ... bbl
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Bertl
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20:35
troy_s
Bertl_oO: I hope there is more than merely a 3x3 matrix as a matrix only can really work on theoretically perfect data.
20:36
troy_s
Bertl_oO: (As in it would require a 3D LUT to properly model the sensor to say, 709. See the typical "rat piss yellow" near highlight blooms etc.)
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se6astian
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23:41
Bertl_oO
troy_s: not sure what you're talking about
23:44
troy_s
The color transform to 709 for that pipe.
23:45
Bertl_oO
on the analog devices chip, all there is is a 3x3 matrix, 3 offsets and clipping to specific ranges
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00:12
troy_s
Hrm. I guess that explains why so many imaging devices end up with the rat piss yellow highlights issue or something close.
00:15
Bertl_oO
I think the main purpose of the CSC in the AD chip is to convert to YCrCb from RGB and/or to convert from full range (0-255) to limited range (16-240) and vice versa
00:15
Bertl_oO
at least that is what the examples show, so I don't think it is intended as generic color correction
00:20
Bertl_oO
but I doubt we will ever revisit this analog devices chip, it was what we had to use on the Alpha, but that's it
00:28
troy_s
Gotcha.
00:29
troy_s
There must be chips out there for sensors that permit a 3D LUT? Or is that specifically part of the FPGA pipe itself?
00:29
Bertl_oO
yes, we will put that into the FPGA
00:31
troy_s
There are plenty of video cameras that, as they blow out, have nasty color skew as the highlights roll off. I suspect it is because of a mere matrix on the transform.
00:33
Bertl_oO
possible