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02:59 | Bertl_oO | off to bed now ... have a good one everyone!
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07:03 | se6astian | good morning
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07:09 | BAndiT1983 | hi
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10:30 | Bertl_zZ | changed nick to: Bertl
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10:30 | Bertl | morning folks!
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11:04 | se6astian | good day
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15:28 | anuejn | yay, the naps testsuite is green again and we dont need tooo horrible hacks for that anymore :)
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15:29 | se6astian | hurray!
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15:59 | vup | yay
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17:06 | tpw_rules | anuejn: first pr is done! hopefully it is good
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17:24 | anuejn | tpw_rules: I have to admit that I dont really understand the problem with using the connectors
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17:24 | anuejn | since you are creating one DiffPairs per lane anyways
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17:25 | vup | (I also left some notes)
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17:26 | tpw_rules | vup: is your name `rroohhh` on github?
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17:26 | vup | yeah
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17:27 | tpw_rules | ok. i chose not to use the connectors because it would have been an additional table. i just wasn't sure of a good way to represent the data
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17:28 | tpw_rules | also i did not use SPIResource because the micro r2 platform did not use I2CResource. i forgot to ask but both should probably be changed to use the corresponding Resource
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17:28 | anuejn | yup sounds good
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17:30 | vup | tpw_rules: not really, you could use the `JX{1,2}_0:{num}` syntax to avoid a seperate table, no?
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17:30 | vup | micro r2 should probably use I2CResource :)
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17:30 | tpw_rules | i will change both to use the Resource
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17:30 | vup | great
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17:30 | tpw_rules | i could, i did not know that syntax existed. but then the table would be really wide
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17:32 | vup | If you want to avoid having the table very wide, you could just have a table of tuples, with (connector number, number on connector) and generate the full string in the for loop
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17:33 | vup | (or a table with "1:3 2:4 1:123 ...")
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17:33 | tpw_rules | ok, i prefer a tall table. would you object to having the table as a module constant?
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17:33 | vup | nope that seems fine
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17:35 | tpw_rules | ah, i remember another reason i did not use SPIResource: i don't think it's possible to represent that chip select is active high
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17:40 | tpw_rules | also, is it possible to simply swap the P and N pins for lane 18 or will that upset the FPGA pin layout planner?
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17:45 | vup | tpw_rules: Ahh, that is indeed a problem, do you want to open a nmigen-boards issue about that?
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17:47 | vup | simply swapping the pins does not work unfortunately, you will get vivado yelling at you by doing that :)
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17:47 | tpw_rules | i can do that
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17:47 | tpw_rules | and okay, that's kind of what i expected. i guess which pins are P and which are N is fixed into the silicon
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17:47 | vup | yep
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17:49 | tpw_rules | is it okay if i force push the changes or would you prefer a new commit
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17:51 | vup | force pushing is fine
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17:59 | Bertl | off for now ... bbl
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17:59 | Bertl | changed nick to: Bertl_oO
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18:02 | tpw_rules | okay the new version is up
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18:14 | tpw_rules | vup: actually, let me change the spi pin names to use the SPIResource ones instead of the sensor ones, that will probably make more sense in the long run
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18:14 | vup | yeah, makes sense
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18:15 | tpw_rules | also i just saw your comment, let me confirm the direction too
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