Current Server Time: 09:48 (Central Europe)

#apertus IRC Channel Logs

2021/04/08

Timezone: UTC


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Spirit532
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BAndiT1983
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Bertl_oO
off to bed now ... have a good one everyone!
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Bertl_oO
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04:20
tpw_rules
alright, I submitted my GSoC draft too. hopefully you guys have time to review it :)
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BAndiT1983|away
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se6ast1an
good day
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manavnair_
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Bertl_zZ
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10:01
Bertl
morning folks!
10:03
manavnair48
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10:03
BAndiT1983
hi
10:23
manavnair48
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10:25
manavnair
Hi
10:26
manavnair
I wanted some more information regarding the project Bidirectional Protocol
10:26
manavnair
for FPGA communication.
10:27
manavnair
From my understanding the packet is not defined
10:28
manavnair
what protocol are you going to follow for that?
10:43
Bertl
hey manavnair!
10:44
Bertl
yes, that is correct, for task T731, the packet level is not defined
10:47
Bertl
the task is mainly about getting the lower layers working correctly and ensuring that the communication is optimal
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pani
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pani
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11:08
manavnair
Ok
11:08
manavnair
there is a mention of bit error rate
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pani
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pani
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11:12
manavnair
do you mean to have it as testing mechanism or to implement a Error correction code
11:22
Bertl
bit error rate is something to measure during testing and actual data transfer
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Dest123
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11:22
Bertl
error correction codes are an option to reduce the bit error rate
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markusengsner
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11:40
manavnair
ok
11:41
manavnair
so what all protocols would the lattice board be running on ?
11:43
manavnair
because the maximum bandwidth specified is 500
11:45
Bertl
I2C, SPI, JTAG, UART, GPIO
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pani
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lambamansha
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Bertl
off for now ... bbl
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Bertl
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pani
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pani
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manavnair
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BAndiT1983
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BAndiT1983|away
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markusengsner
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17:54
markusengsner
Good evening!
18:09
BAndiT1983
hi
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BAndiT1983
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