Current Server Time: 22:51 (Central Europe)

#apertus IRC Channel Logs

2021/04/08

Timezone: UTC


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Spirit532
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BAndiT1983
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Bertl_oO
off to bed now ... have a good one everyone!
04:27
Bertl_oO
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05:20
tpw_rules
alright, I submitted my GSoC draft too. hopefully you guys have time to review it :)
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BAndiT1983|away
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se6ast1an
good day
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Bertl_zZ
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11:01
Bertl
morning folks!
11:03
manavnair48
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11:03
BAndiT1983
hi
11:23
manavnair48
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11:25
manavnair
Hi
11:26
manavnair
I wanted some more information regarding the project Bidirectional Protocol
11:26
manavnair
for FPGA communication.
11:27
manavnair
From my understanding the packet is not defined
11:28
manavnair
what protocol are you going to follow for that?
11:43
Bertl
hey manavnair!
11:44
Bertl
yes, that is correct, for task T731, the packet level is not defined
11:47
Bertl
the task is mainly about getting the lower layers working correctly and ensuring that the communication is optimal
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pani
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pani
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12:08
manavnair
Ok
12:08
manavnair
there is a mention of bit error rate
12:08
pani
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pani
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12:12
manavnair
do you mean to have it as testing mechanism or to implement a Error correction code
12:22
Bertl
bit error rate is something to measure during testing and actual data transfer
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Dest123
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12:22
Bertl
error correction codes are an option to reduce the bit error rate
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markusengsner
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12:40
manavnair
ok
12:41
manavnair
so what all protocols would the lattice board be running on ?
12:43
manavnair
because the maximum bandwidth specified is 500
12:45
Bertl
I2C, SPI, JTAG, UART, GPIO
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lambamansha
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Bertl
off for now ... bbl
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Bertl
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pani
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pani
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pani
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pani
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manavnair
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BAndiT1983
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BAndiT1983|away
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markusengsner
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18:54
markusengsner
Good evening!
19:09
BAndiT1983
hi
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BAndiT1983
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