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| 17:00 | se6astian | MEETING TIME, who is here?
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| 17:04 | se6astian | anyone?
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| 17:05 | se6astian | its not halloween!
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| 17:08 | getzi | I'm here, I guess ;)
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| 17:09 | se6astian | hurray :D
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| 17:09 | se6astian | how is the color charting going?
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| 17:10 | getzi | working out the quirks of the raw recorder
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| 17:12 | se6astian | have you had the session with vup for darkframe capture ?
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| 17:13 | getzi | not yet, but we are in contact
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| 17:14 | getzi | for some reason I have some kind of a connectivity issue with the hdmi modules, only one is working reliably unfortunately
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| 17:15 | getzi | BUT the old lightmeter you gave me seems to be working :)
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| 17:15 | se6astian | ah, did the screw not solvethe problem..
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| 17:15 | se6astian | good
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| 17:15 | se6astian | we are assembling new hdmi plugin modules on the 21st
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| 17:15 | se6astian | but can you try to swap the 2 you have
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| 17:15 | se6astian | to verify if its the slot or the module
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| 17:18 | Bertl | is here as well (late but nevertheless ;)
| | 17:19 | se6astian | very good, any news Bertl ?
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| 17:20 | anuejn | is here as well
| | 17:20 | Bertl | yes, there has been quite some progress on the work we have been doing for LAM/INT
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| 17:21 | se6astian | great! please elaborate
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| 17:22 | Bertl | basically decoupling the input and output pipeline, getting high bandwidth HDMI raw data transfer working and testing both square center cutout full frame as well as binned data
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| 17:22 | Bertl | the address generators were redone, they now also contain a simulation mode where the settings can be tested on the actual firmware
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| 17:23 | Bertl | new scripts have been created to control those address generators (now used for both, capture and HDMI output) and a bunch of new raw output modes have been tested
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| 17:24 | Bertl | the sequencer was removed from the gateware (FPGA) and placed in userspace, utilizing the userio kernel module and the PL-PS interrupt framework
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| 17:25 | Bertl | we also increased the capture buffer to 3/4th of the entire memory of the microzed, allowing for 32 frames to be captured into memory
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| 17:25 | Bertl | (with binning, this allows for up to 128 "full" frames)
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| 17:26 | se6astian | cool, how is the realtime part on the CPU behaving, did you dedicate one CPU or is there no issue with the scripts latency ?
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| 17:26 | Bertl | the raw HDMI was tested with a Magewell four channel PCIe card, where we can capture A and B raw frames on two separate channels
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| 17:27 | Bertl | the script is currently not running at realtime and is a simple python script, the timing might not be perfect but it seems to be sufficient for testing
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| 17:27 | Bertl | there is not too much what the script actually does, it waits (with a select) for any interrupt, then updates the address generator and confirms the interrupt
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| 17:28 | Bertl | as the capture and the HDMI output is still handled from the FPGA, the script has quite some wiggleroom to update the generators
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| 17:28 | se6astian | I see, so the acquisition triggering is still an FPGA task?
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| 17:29 | Bertl | the trigger is part of the script, but it is okay to leave the trigger on, which will do one exposure after the other
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| 17:29 | Bertl | of course, if you want to do precise timing, it would be necessary to make that also based on some interrupt or have it run as a realtime process with known delays
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| 17:30 | Bertl | the entire setup was tested with full frame binning and we achieved 99.2 FPS with 10ms exposure there
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| 17:30 | Bertl | that is with overlapping read-out of course
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| 17:30 | se6astian | very nice
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| 17:31 | se6astian | ah that is also possible now, cool!
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| 17:31 | se6astian | would be interesting to measure what frametime and deviations we get from ideal FPS
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| 17:32 | Bertl | you mean when you try to fix the frame time to e.g. 25FPS or so?
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| 17:33 | se6astian | yes, if the 40ms between frames is maintained
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| 17:33 | se6astian | or if its 38, then 42ms, etc.
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| 17:33 | Bertl | I'd say there will be some jitter caused by interrupt latency as well as the script sending the trigger
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| 17:33 | Bertl | but in the future, we could use an FPGA based 'timer' to trigger the exposure as well
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| 17:33 | se6astian | but is it 39.99ms and then 40.01, or 35ms then 45ms, thats what I would be interested in
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| 17:33 | Bertl | that should not be too hard to do ;)
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| 17:34 | Bertl | also using something faster than python (C or Rust for example) should bring the jitter down there
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| 17:35 | Bertl | as I said, the test so far used continuous acquisition, so the frame rate is quite constant
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| 17:35 | se6astian | very nice
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| 17:35 | se6astian | will you write some documentation about this soon?
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| 17:35 | se6astian | and are the scripts released already?
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| 17:35 | Bertl | hopefully yes, we probably also want to integrate the scripts in our firmware
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| 17:36 | se6astian | exactly :)
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| 17:36 | se6astian | anuejn: any news on your front?
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| 17:36 | Bertl | the scripts are not secret, but they need some more testing and cleanup (so will be uploaded soon)
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| 17:36 | se6astian | great
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| 17:36 | Bertl | that's it from my side
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| 17:37 | anuejn | not too much on my side
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| 17:37 | se6astian | many thanks
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| 17:37 | anuejn | i have spoken to the photo lab at my uni
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| 17:37 | anuejn | sadly they only have one defined illuminant
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| 17:37 | anuejn | (thungsten)
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| 17:37 | anuejn | I would have to bring the other
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| 17:38 | anuejn | everything else they could provide
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| 17:38 | anuejn | I also started working on improving the dng writing in the recorder so that it is possible to user-specify metadata tags
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| 17:38 | anuejn | but that is not done yet
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| 17:39 | anuejn | thats it from my side
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| 17:39 | se6astian | very good, thanks
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| 17:39 | se6astian | quick updates from my side: hdmi plugin module pcbs have been received from oshpark and manual assembly is currently planned for the 21st
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| 17:40 | se6astian | Bertl: did you also have a chance to look at the new batch of boards already?
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| 17:43 | Bertl | no detailed inspection yet, just a few checks ...
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| 17:43 | Bertl | but it basically looks like last time, the automated placement is quite good, the manual soldering is rather bad
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| 17:44 | se6astian | but any showstoppers so far or just some manual rework required here and there?
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| 17:45 | Bertl | thanks to the BiSn workflow, everything should be reworkable
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| 17:45 | se6astian | excellent
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| 17:45 | Bertl | I haven't checked whether the connectors have been glued or not
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| 17:45 | Bertl | but IIRC we requested them not to be glued, so that should be fine as well
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| 17:46 | se6astian | we did yes, lets hope they remembered that
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| 17:49 | se6astian | ok, anyone else with news or things to report?
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| 17:53 | se6astian | alright then, MEETING CONCLUDED, many thanks everyone for the news
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| 17:54 | Bertl | thanks for the moderation!
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| 17:55 | se6astian | my pleasure
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