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22:28 | Bertl | back now ...
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22:37 | FergusL | wb Bertl
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22:37 | FergusL | my VNG python script now works perfect !
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22:37 | FergusL | but it's painfully slow and utterly stupid in its inner workings
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22:38 | Bertl | how do you know it works perfectly?
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22:38 | FergusL | I tried with a test image
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22:39 | Bertl | and how did you evaluate the result?
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22:42 | FergusL | comparison
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22:42 | FergusL | brb, let me show you after dinner
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22:46 | Jehan_ZeMarmot | Hi.
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22:46 | Bertl | hey
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22:46 | Jehan_ZeMarmot | Sebastian told me to come down here for some bash script. :-)
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22:46 | Jehan_ZeMarmot | I have not read the pdf yet though.
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22:46 | Bertl | excellent! what script in particular?
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22:47 | Jehan_ZeMarmot | Bertl: no idea.
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22:47 | Jehan_ZeMarmot | He just told me some scripts were needed.
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22:47 | Jehan_ZeMarmot | I can write what you need.
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22:47 | Bertl | that sounds good!
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22:47 | Bertl | actually that sound great! :)
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22:48 | Jehan_ZeMarmot | Bertl: I guess I have to read this pdf manual though?
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22:48 | Jehan_ZeMarmot | He forwarded an email about PLL and I have no idea what it is. Apparently he could not tell me either.
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22:48 | Bertl | hehe, yeah, you probably have to read that to write a script
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22:48 | Jehan_ZeMarmot | I know about software, unfortunately not much about hardware.
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22:49 | Jehan_ZeMarmot | Ok. I'll read it now.
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22:49 | Bertl | do you have an idea what a PLL is?
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22:49 | Jehan_ZeMarmot | Bertl: none.
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22:49 | Jehan_ZeMarmot | I mean, I have from the name.
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22:49 | Jehan_ZeMarmot | Phase-Locked Loop.
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22:49 | Bertl | okay, let me give you a wikipedia supported crash course then
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22:49 | Jehan_ZeMarmot | But that does not help much. :-D
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22:49 | Bertl | http://en.wikipedia.org/wiki/Phase-locked_loop
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22:50 | Bertl | http://en.wikipedia.org/wiki/File:PLL_generic_inline.svg
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22:50 | Bertl | this is the basic building block for a PLL
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22:50 | Bertl | looks complicated, but the principle is rather simple
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22:51 | Bertl | you have a frequency at the input, a variable oscillator running inside producing the output and a feedback loop which adjusts the oscillator to 'match' the input somehow
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22:52 | Jehan_ZeMarmot | I see.
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22:52 | Jehan_ZeMarmot | And what is this output for?
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22:52 | Bertl | http://www.xilinx.com/support/documentation/user_guides/ug472_7Series_Clocking.pdf
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22:53 | Jehan_ZeMarmot | The pdf Seb sent me was: http://www.xilinx.com/support/documentation/application_notes/xapp888_7Series_DynamicRecon.pdf
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22:53 | Bertl | on page 71 you have an example for such a setup
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22:53 | Bertl | the output is used to control various building blocks in an FPGA
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22:53 | Bertl | in this specific case the HDMI output
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22:54 | Jehan_ZeMarmot | Ok. Looks complicated. :-)
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22:54 | Jehan_ZeMarmot | Am I supposed to read this second pdf too fully?
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22:54 | Jehan_ZeMarmot | 114 pages.
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22:54 | Bertl | not really
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22:54 | Jehan_ZeMarmot | Cool.
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22:54 | Jehan_ZeMarmot | It is rainy outside, but still. :p
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22:54 | Bertl | but it will help to read the MMCM/PLL sections
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22:55 | Bertl | so basically chapter 3
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22:55 | Jehan_ZeMarmot | Basically though if I understand:
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22:55 | Jehan_ZeMarmot | This PLL has an input (that you can provide through a bash API you wrote) which controls an output.
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22:56 | Jehan_ZeMarmot | You want to have an easy script to set the input from a terminal, using this API.
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22:56 | Jehan_ZeMarmot | Is that it?
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22:56 | Bertl | not exactly
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22:56 | Jehan_ZeMarmot | Ok.
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22:56 | Bertl | it is a little more complicated, but we'll get there soon
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22:57 | Jehan_ZeMarmot | Ok. I guess I'll have to read these then.
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22:57 | Jehan_ZeMarmot | I was hoping for a shortcut. :p
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22:57 | Bertl | for us, the basic function of the PLL is to take a fixed input (100MHz clock)
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22:57 | Bertl | and generate a 'desired' output (50-250MHz) in a stable manner
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22:58 | Bertl | to do that, we use something called the DRP (dynamic reconfiguration port) for this PLL
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22:58 | Bertl | which allows us to 'reprogramm' the PLL from a bash script
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22:59 | Bertl | (by setting the DRP registers)
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22:59 | Jehan_ZeMarmot | I see.
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22:59 | Jehan_ZeMarmot | And you already have the base block for this?
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22:59 | Bertl | think of it like reprogramming a device by setting specific registers
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22:59 | Jehan_ZeMarmot | Like some low level API call.
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23:00 | Jehan_ZeMarmot | And you would like an higher level script, then?
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23:00 | Bertl | yes, the registers are mapped into memory, the platform is arm linux, so if you stick to shell scripting for example, there is a simple wrapper which uses the command devmem
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23:01 | Jehan_ZeMarmot | I see.
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23:01 | Bertl | let me upload the code, sec
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23:02 | Jehan_ZeMarmot | I see that devmem seems to be a busybox command.
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23:04 | Bertl | http://vserver.13thfloor.at/Stuff/AXIOM/SCRIPTS/cmv.func
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23:04 | Bertl | the last function 'pll_reg' will allow to read and write the DRP registers
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23:04 | Jehan_ZeMarmot | I can't find the same command in a normal GNU environment. But I could find a devmem2. Is it working the same?
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23:05 | Bertl | basically, but if you want to 'test' just replace devmem by a printf or echo
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23:05 | Bertl | (otherwise you'll overwrite your memory with garbage)
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23:05 | Bertl | alternatively you can use the busybox here:
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23:05 | Jehan_ZeMarmot | lol ok.
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23:06 | Bertl | http://vserver.13thfloor.at/Stuff/AXIOM/FAKE/
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23:06 | Bertl | which uses a 'fake' devmem
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23:06 | Bertl | i.e. it accesses /tmp/mem instead of /dev/mem
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23:06 | Bertl | https://wiki.apertus.org/index.php?title=Axiom_Alpha_Prototype#Reading_and_Writing_Sensor_Register
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23:06 | FergusL | hi Jehan_ZeMarmot
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23:07 | Jehan_ZeMarmot | Bertl: what are these binaries?
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23:07 | Bertl | that is busybox with a modified devmem
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23:07 | Bertl | you can build it yourself and just change "/dev/mem" to "/tmp/mem" in the source
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23:08 | Jehan_ZeMarmot | But like what, virtual machines?
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23:08 | Bertl | nah, those are 'native' binaries for the given architecture
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23:08 | Bertl | so 32/64 bit intel and arm
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23:08 | Jehan_ZeMarmot | You mean, I just execute them?
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23:08 | Bertl | usually yes, they are elf binaries :)
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23:08 | Jehan_ZeMarmot | I saw this.
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23:09 | Jehan_ZeMarmot | Ok. I'll try to run the x86-64 then.
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23:10 | Jehan_ZeMarmot | Ok my laptop did not explode.
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23:10 | Bertl | you need to make a symlink called devmem which points to this binary or you change the devmem to something like 'busybox.static.x86_64 devmem'
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23:10 | Bertl | (in the pll_reg wrapper)
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23:10 | Jehan_ZeMarmot | I see. Or simply an alias. :-)
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23:11 | FergusL | (are you french Jehan_ZeMarmot ?)
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23:11 | Jehan_ZeMarmot | FergusL: hi. Yes that appears to be what is on my passport. :-)
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23:11 | FergusL | fort bien
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23:11 | FergusL | simple question from what I recalled :)
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23:13 | Jehan_ZeMarmot | :-)
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23:13 | Jehan_ZeMarmot | Bertl: what does "cmv" mean?
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23:13 | FergusL | Cmosis Machine Vision I guess ?
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23:13 | Bertl | that is the first part of CMV12000 or CMV12K which is the sensor we use
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23:15 | Bertl | and interpreting those registers would be another task for a script or C program
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23:15 | Bertl | (that's why I asked what script you would like to work on :)
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23:16 | Jehan_ZeMarmot | Bertl: yes actually I'll need to know what you want.
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23:16 | Jehan_ZeMarmot | I mean like the spec of the end high level script.
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23:17 | Jehan_ZeMarmot | I would not "like to work" on anything, because I don't really much know the needs there. And I unfortunately don't have time to help fulltime right now.
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23:17 | Jehan_ZeMarmot | (maybe)
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23:18 | Jehan_ZeMarmot | But I can do what *you* need in priority if you have precise instructions. :-)
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23:18 | Jehan_ZeMarmot | Script or C, or whatever, I don't really care.
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23:18 | Bertl | for the PLL, it should be able to configure the PLL via DRP so that it outputs the desired frequency (given as argument)
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23:18 | Jehan_ZeMarmot | Bertl: can you give me a command line example of this?
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23:19 | Jehan_ZeMarmot | Something like: $ axiom-pll 100
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23:19 | Bertl | pll_out 1 150000000
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23:19 | Jehan_ZeMarmot | ?
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23:19 | Jehan_ZeMarmot | What is 1?
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23:19 | Bertl | output 1 of the PLL
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23:19 | Bertl | (it has 6 outputs which are basically identical just different registers)
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23:20 | Jehan_ZeMarmot | Ok.
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23:20 | Jehan_ZeMarmot | But isn't it basically what are already doing the bash script I see.
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23:21 | Jehan_ZeMarmot | They take a number, compute an address (I imagine this number is 1 to 6) as first arg, and another which is the contents of the register as second.
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23:21 | Jehan_ZeMarmot | And write it to the computed address.
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23:21 | Bertl | the pll_reg sets a single register for the PLL, but a number of registers need to be configured to specific values based on the desired frequency to configure the PLL DRP
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23:21 | Bertl | http://www.xilinx.com/support/documentation/application_notes/xapp878.pdf
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23:22 | Bertl | http://www.xilinx.com/support/documentation/application_notes/xapp888_7Series_DynamicRecon.pdf
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23:22 | Bertl | (the latter one is the relevant one)
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23:23 | Bertl | we always desire 50% duty cycle and a 0° phaseshift
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23:23 | Bertl | and the PLL needs to be configured in such a way that the VCO is within the given bounds
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23:26 | Bertl | http://www.xilinx.com/support/documentation/data_sheets/ds187-XC7Z010-XC7Z020-Data-Sheet.pdf (page 46)
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23:26 | Bertl | so basically between 800 and 1600 MHz
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23:38 | Jehan_ZeMarmot | Ok. You know what. That's a lot of info. I'll need to process it (= read your stuff).
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23:39 | Jehan_ZeMarmot | Though I'm just not sure what to read first. You sent me like 4 pdf.
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23:39 | Bertl | basically the xapp888 should suffice
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23:39 | Bertl | the other stuff is for illustration
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23:40 | Jehan_ZeMarmot | Ok.
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23:40 | Bertl | from the XC7Z020 data sheet you only need the one page (46)
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23:40 | Bertl | and the fact that we have speed grade -1
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23:43 | Bertl | you'll probably need code to do bitmanipulation, you might find something usefull here: http://vserver.13thfloor.at/Stuff/AXIOM/SCRIPTS/bit.func
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23:56 | Jehan_ZeMarmot | Is it needed for tests? For actual running code?
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23:57 | Bertl | the PLL config? yes
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23:57 | Bertl | we need to adjust the HDMI clock to the output device
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23:58 | FergusL | can't find a way to export properly from nthe goddamn Blender
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00:11 | Bertl | Jehan_ZeMarmot: did you get the answer to your question?
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00:14 | Jehan_ZeMarmot | Bertl: not really.
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00:14 | FergusL | troy_s: I'm trying to export from Blender to show the results of VNG
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00:15 | FergusL | but the damn thing bakes or marks something
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00:15 | FergusL | so it's blown out in any other softwrae
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00:17 | FergusL | I'm not adding any metadata in my files with oiio
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00:17 | FergusL | maybe that's what is missing ?
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00:17 | FergusL | in Blender I have to disable CM to get the right picture
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00:20 | Jehan_ZeMarmot | Bertl: do I care about MMCM?
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00:20 | Jehan_ZeMarmot | Or only PLL?
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00:22 | FergusL | Bertl: do you have Blender ?
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00:23 | Bertl | 01:57 < Bertl> the PLL config? yes
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00:23 | Bertl | 01:57 < Bertl> we need to adjust the HDMI clock to the output device
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00:23 | Bertl | basically MMCM and PLL are very similar except for the fractional output on MMCM
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00:24 | Bertl | in this specific case we do not care about MMCM, we use the PLL and it should suffice
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00:24 | Jehan_ZeMarmot | Ok.
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00:24 | Jehan_ZeMarmot | I hope you'll understand that I work in half-blind, because I don't understand half of the terms. Sorry if my questions look dumb.
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00:25 | Bertl | no problem, just ask if something is unclear
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00:25 | Jehan_ZeMarmot | So I'm mostly looking into these as "I have an input which produces an output".
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00:26 | Bertl | in our case, the input is fixed at 100MHz (for the PLL)
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00:27 | Bertl | in a simplified view, we basically multiply that by N
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00:27 | Bertl | and divide the result by M
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00:27 | Bertl | the device limits say that N must be between 8 and 16 for 100MHz input
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00:28 | Bertl | the the PLL itself limits M to 1 - 128
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00:28 | Bertl | so for example to get 50Mhz output, we can do
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00:28 | Bertl | N = 8 -> 800Mhz, M = 16 -> 50MHz out
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00:29 | Bertl | but N = 10 -> 1000MHz, M = 20 -> 50MHz out works as well
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00:31 | Jehan_ZeMarmot | The input is always the same, but we want to change the output, is that it?
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00:31 | Jehan_ZeMarmot | So we just have to compute a valid N and M for the desired output?
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00:31 | Bertl | so the script has to do two things: a) figure out the optimal N and M and b) configure the registers appropriately
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00:32 | Jehan_ZeMarmot | If there are several N and M value for the exact same result (as in your example above), is one more optimal than the other?
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00:32 | Jehan_ZeMarmot | Like a smaller N is better, or something.
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00:32 | Bertl | in a second step (not right now) we want to do that for all outputs in one setting, because the N is shared between all outputs
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00:33 | Bertl | so there can be only one N but many M (M0-M5)
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00:33 | Jehan_ZeMarmot | I see.
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00:33 | Bertl | in the case where we have different Ns the lowest N is probably the best
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00:34 | Bertl | (but it doesn't matter that much)
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00:35 | Jehan_ZeMarmot | Ok. But I have skimmed through xapp888 and there is no mention of N and M.
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00:36 | Jehan_ZeMarmot | There are a bunch of registers though. You told me above that there are 6 of them, but here they speak fo 16 + 1.
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00:37 | Bertl | I said there are 6 outputs not registers
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00:37 | Jehan_ZeMarmot | Actually MCMM doubles the eight clock output, but that still means PLL has 8 + 1.
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00:37 | Jehan_ZeMarmot | So I am lost.
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00:37 | Jehan_ZeMarmot | Bertl: oh ok.
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00:38 | Bertl | to be precise, there are at least 6 outputs, in the MMCM case there are 7 and there is also the feedback output
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00:39 | Bertl | the feedback output controls the 'N' (my pick of N and M was unfortunate in this regard, as it is called 'M' in the xapp)
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00:40 | Bertl | frequency multiplication (i.e. making that 'N' work) in hardware requires a feedback which 'divides' the output and feeds it back to the input
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00:42 | Bertl | in the DRP registers, the N and M is configured as high and low time
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00:42 | Bertl | which controls the duty cycle _and_ the divider
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00:42 | Jehan_ZeMarmot | Oh ok. No wonder I get lost if all the names change constantly. :p
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00:43 | Bertl | never said it would be simple :)
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00:44 | Jehan_ZeMarmot | " The appropriate lock bit settings are dependent on the feedback
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00:44 | Jehan_ZeMarmot | divider setting. This divider is set with the CLKFBOUT_MULT attribute when instantiating the
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00:44 | Jehan_ZeMarmot | MMCM_DRP module. "
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00:44 | Bertl | if you feel uncomfortable with the PLL complexity, maybe consider interpreting the CMV registers instead
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00:45 | Jehan_ZeMarmot | If I understand, the feedback is N.
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00:45 | Jehan_ZeMarmot | So that's also contradictory. You just told me N was the high time.
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00:46 | Bertl | no, what I said was, that N and M is controlled by setting the high and low time
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00:46 | Jehan_ZeMarmot | hmmm...
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00:46 | Bertl | i.e. to set N you need to set a high _and_ low time for this clock register
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00:46 | Bertl | and similar for M
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00:46 | Jehan_ZeMarmot | Ok.
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00:47 | Jehan_ZeMarmot | Wow. Maybe with examples, I'd understand better.
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00:47 | Jehan_ZeMarmot | I mean, real time examples.
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00:48 | Bertl | for example, to get a divide by 2, you set both high and low to 1
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00:48 | Jehan_ZeMarmot | s/real time/real life/
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00:48 | Bertl | that will give 50% duty cycle and a total of 2 periods
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00:48 | Jehan_ZeMarmot | That's an addition?
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00:48 | Bertl | ___/``````\______/``````\___
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00:49 | Bertl | ``` = high, ___ = low
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00:49 | Bertl | if you set high to 2 and low to 1 then you get:
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00:50 | Bertl | ___/````````````\______/````````````\___
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00:50 | Bertl | which has 66% duty cycle and divides by 3
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00:50 | Bertl | but there is also a trick to get 50% duty cycle with a division of 3
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00:51 | Bertl | what was the last line you got?
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00:51 | Jehan_ZeMarmot | 14:50 < Bertl> which has 66% duty cycle and divides by 3
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00:51 | Bertl | 02:50 < Bertl> but there is also a trick to get 50% duty cycle with a division of 3
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00:52 | Bertl | by setting the edge bit
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00:52 | Bertl | which basically changes when the low/high transision happens
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00:53 | Bertl | (this example is given in the Divider Group section of xap888)
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00:55 | Bertl | similar applies to any off-by-one setting, e.g. 4+5
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00:55 | Bertl | (with edge -> 4.5+4.5 = 9
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00:56 | Bertl | so the edge bit can be considered the lowest bit)
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01:13 | Jehan_ZeMarmot | Ok but I still don't understand. It is either assuming too much of knowledge of terms. Or not giving enough technical details.
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01:13 | Jehan_ZeMarmot | Like 1 "parameter" (high/low time for instance). They are registers?
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01:14 | Jehan_ZeMarmot | So 32 bit?
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01:14 | Jehan_ZeMarmot | Or is it 64? Or something else?
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01:14 | Bertl | the information is distributed over all the pdfs I linked
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01:14 | Bertl | in this specific case, the DRP registers are 16bit
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01:15 | Bertl | but we mapped them as 32bit memory locations
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01:15 | Bertl | (the upper 16bits are ignored)
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01:15 | Jehan_ZeMarmot | Ok.
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01:15 | Jehan_ZeMarmot | I see that the high/low times are flags in the DivReg register.
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01:17 | Bertl | they are bit ranges in the DivReg registers
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01:17 | Jehan_ZeMarmot | So DivReg is one of the 6 registers you told me about, right?
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01:17 | Bertl | each output has a DivReg
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01:18 | Jehan_ZeMarmot | Ok.
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01:19 | Jehan_ZeMarmot | Right. There was 6 outputs, not register. Sorry.
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01:19 | Jehan_ZeMarmot | But I think I'm starting to get it.
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01:19 | Jehan_ZeMarmot | So in your example above:
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01:19 | Jehan_ZeMarmot | < Bertl> pll_out 1 150000000
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01:19 | Bertl | the bit ranges can be seen like structures, i.e. bits 0-5 (6 bits) are a '6 bit value' for the low time
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01:20 | Jehan_ZeMarmot | I would basically update the 6 registers for this output.
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01:20 | Jehan_ZeMarmot | For instance I would update DivReg so that high and low time are the expected values.
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01:20 | Bertl | well, in this example only two of them the feedback and the 1st output
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01:20 | Bertl | but it is probably better to change that specification to
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01:21 | Bertl | pll_out 150000000 300000000 250000000
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01:21 | Jehan_ZeMarmot | Yes but if I recall, the feedback is determined by high and low time.
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01:21 | Jehan_ZeMarmot | So I would probably just update DivReg?
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01:21 | Bertl | which sets the first three outputs to 150, 300 and 250MHz respectively and the last three outputs to 100MHz or so
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01:23 | Bertl | you see the diagram on page 4 of the xapp888 ?
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01:23 | Jehan_ZeMarmot | I do.
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01:23 | Bertl | you basically have to figure out O0-O6 and M for a given set of 'desired' frequencies
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01:24 | Bertl | then you can simply convert the O0-O6 and M values to high/low + edge settings
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01:24 | Bertl | which can be simply programmed into the registers
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01:26 | Jehan_ZeMarmot | Ok. That's more a language I understand.
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01:27 | Jehan_ZeMarmot | Now the question is: how do I figure out O0 to 6 and M for a frequency?
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01:28 | Bertl | the PLL tries to match the feedback input to the input frequency
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01:29 | Bertl | so if your M is set to divide by 8, the VCO frequency will be adjusted to 8 times the input frequency, in our case 800MHz
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01:32 | Bertl | so it basically is a 'simple' optimization task, get the best matches for the given frequencies under the constraints that M is between 8 and 16 and O0-O6 between 1 and 128
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01:33 | Bertl | note that it would be good to output the selected frequencies (as result of M and Ox) for verification
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01:34 | Jehan_ZeMarmot | Ok I have to go make and eat some lunch. Let's continue later.
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01:35 | Jehan_ZeMarmot | Already 3PM. My stomach is too hungry. :-D
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01:35 | Jehan_ZeMarmot | Damn 3:30 even.
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01:38 | troy_s | FergusL: email me with screenshots
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01:38 | troy_s | FergusL: blown out suggests your values are getting mangled. Or adding a TRC
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01:49 | Bertl | wb aombk!
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01:49 | aombk | hi Bertl
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03:02 | troy_s | Bertl: Are there registers to twiddle for white balance on that sensor?
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03:10 | Bertl | no
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03:20 | Bertl | the panchromatic and RGB color version is identical in regard of registers and settings
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03:58 | Bertl | night everyone!
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03:59 | [1]Sasha | joined the channel | |
05:30 | [1]Sasha | left the channel | |
07:09 | Jehan_ZeMarmot | Me too I'll go.
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07:09 | Jehan_ZeMarmot | I'll have a look at this whole discussion and the pdf again and try to understand this all.
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07:09 | Jehan_ZeMarmot | See ya, all!
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08:50 | se6bastian1 | Hello
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09:37 | mars_ | na
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09:37 | mars_ | -na
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09:37 | mars_ | ^^
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11:04 | aombk | live from the hive now http://aombk.attinom.net/otr/?page_id=131
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11:59 | Bertl | morning everyone!
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12:12 | se6astian1 | hello!
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12:13 | se6astian1 | check the elphel development blog as to see what they do in response to our open modules concept
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12:15 | Sasha_C | interesting
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12:16 | Sasha_C | So multiple 393 boards can be linked together
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12:43 | Sasha_C | With their model, I imagine you'd have to tell elphel which components you want to connect to the main 393 board when ordering, and they then build the camera according to your specifications? Those pictures don't make it look like you could just 'connect' the pieces together yourself.
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12:54 | Bertl | I think this is mostly to illustrate that it _can_ be connected somehow :)
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12:58 | Sasha_C | i.c. Funny how Andrey keeps telling us that our design / plans won't work ;)
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13:00 | Bertl | does he?
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13:01 | Sasha_C | He has told us numerous times that we won't be successful, that our designs for a camera are unfeasible
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13:02 | Sasha_C | But I think he's saying this out of fear to dissuade us, thinking that we are his competition and will take customers away from his business
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13:02 | Sasha_C | Ask Sebastian about this in person perhaps...
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13:02 | Bertl | could you link me to those statements and/or do you have a compilation of the rationale behind his opinions?
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13:03 | Sasha_C | I'd have to dig through emails sent to the apertus mailing list
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13:06 | Sasha_C | quick example: This man is doing what he loves and doing it right. He's taking a calculated risk and he's not a danger to others. He's even wearing a helmet, probably only out of respect for you, so please show some respect back.
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13:06 | Sasha_C | This is a gift straight from Liam and Jack to us. Appreciate it and learn from it.
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13:06 | Sasha_C | Life is the long process of dying. I'd say Liam is dying pretty darn well.
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13:06 | Sasha_C | oops, sorry about that. copied wrong text from my clipboard
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13:06 | Sasha_C | http://nofilmschool.com/2013/10/open-source-apertus-camera-4k-global-shutter-super-35mm/
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13:07 | Sasha_C | Andrey has posted a comment at the very bottom of the page
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13:07 | Bertl | I was going to ask who Liam is :)
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13:07 | Sasha_C | my bad, i feel so silly now :)
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13:08 | Bertl | well, the comment is clear and the point is valid, no?
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13:09 | Sasha_C | true, I can't disagree
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13:09 | Bertl | and there are a number of possible answers like:
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13:09 | Bertl | - maybe because they don't want anybody else to use the interface
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13:10 | Bertl | - maybe because it is damn hard to connect different modules
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13:10 | Bertl | - maybe because it is better to do one big do-it-all thing and sell that
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13:11 | Bertl | we don't really know, we can only speculate but it definitely is something we should think about sooner or later
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13:11 | Sasha_C | i agree.
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13:12 | Bertl | so judging from this example, it might be worth to dig through his comments (and other comments) and sum them up somehow
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13:12 | Sasha_C | Yeah, indeed. I still recommend you ask Sebastian more about this business with Andrey (on a private channel perhaps. He's much more informed about this than I am)
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13:12 | Bertl | i.e. compile and distill the information
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13:13 | Sasha_C | yeah
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13:13 | Bertl | (ad sebastian, already did :)
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13:13 | Sasha_C | he's online now?
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13:13 | Bertl | don't know, I asked about it a few weeks ago
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13:13 | Sasha_C | right, i.c
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13:15 | Sasha_C | I'm about to go get some sleep, but I'll start compiling and distilling ASAP (as my time will permit)
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13:16 | Bertl | okay, it might make sense to motivate a few folks to watch/monitor certain channels/sources and do a compilation on a regular basis
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13:17 | Bertl | .. and sleep well :)
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13:17 | Sasha_C | yep, absolutely. I'll do my best to get others to follow suit
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13:17 | Sasha_C | thanks man, chat again soon
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13:19 | troy_s | Bertl: So no native method to shift white balance?
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13:19 | troy_s | Bertl: Because that implies stuffing a matrix operation into the board (with the Bradford transform) so that folks can dial the WB.
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13:20 | Bertl | I don't think that this is such a problem
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13:20 | Bertl | and no, I don't think the sensor is in any way color aware
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13:21 | Bertl | all settings apply to all photosites (only relevant differentiation is between top and bottom readout)
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13:39 | Bertl | troy_s: so a general matrix would suffice for any white balance problem?
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13:40 | Bertl | would that apply before or after a (per channel?) gamma correction
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15:42 | Bertl | welcome rexbron!
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15:42 | rexbron | hey Bertl
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15:44 | rexbron | Bertl: are you the project lead? troy_s mentioned I might like hanging here
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15:45 | Bertl | well, no, but I'm working on the prototype, so consider me the technical prototype lead :)
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15:46 | Bertl | off for dinner now ... bbl
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15:46 | rexbron | Bertl: I wear a lot of hats in the camera department, 1st AC, DIT and sometimes DP.
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16:16 | Bertl | back ...
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16:17 | Bertl | rexbron: I'm not familiar with the camera department acronyms
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16:18 | Bertl | for me AC is alternating current and I don't have any association with DIT or DP :)
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16:18 | rexbron | Bertl: 1st Assistant Camera, Digitial Imaging Technician and Director of Photography. here is a link to my reel http://aehunter.net/video/Andrew_Hunter_Demo_Reel_Aug_22nd.mp4
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16:19 | Bertl | hmm .. my browser (firefox) says: Video can't be played because the file is corrupt, but let me try to download it :)
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16:20 | mars_ | works in chrome
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16:20 | Bertl | so, you're doing a lot of stuff and something interested you enough in axiom/apertus to find your way here ...
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16:21 | Bertl | mars_: yeah I guess mplayer will be able to handle it ...
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16:22 | rexbron | Bertl: troy_s is a old friend of mine, we both have an interest in FOSS as well as cinematography
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16:22 | Bertl | sounds good!
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16:23 | rexbron | Bertl: I also designed a run stop controller for cameras with the LANC protocol but ended up stopping making them after the first production run. I'm not an electrical engineer or embeded systems guy so I couldn't diagnose some intermitency problems.
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16:23 | rexbron | and on set, reliability is paramount
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16:24 | Bertl | so this demo reel is basically like a set-card just for an AC/DIT/DP, yes?
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16:24 | rexbron | Bertl: DP, AC and DITs get hired on reputation not with show reels
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16:24 | rexbron | mostly to show people "this is what I can do" visually
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16:25 | Bertl | I see, so more to give an idea of the style?
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16:27 | Bertl | just watched it, looks nice, for me almost like a music video or a movie teaser (please don't take my comments the wrong way, I'm completely new to the camera department)
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16:29 | rexbron | Thats generally the idea :)
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16:29 | Bertl | what's a run-stop controller?
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16:30 | rexbron | The footage is a mix of Red One MX, Blackmagic Cinema Camera and a little 7D
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16:30 | Bertl | the first two I recognize as camera brands, I presume the last one is a camera as well (see, I've already learned a little about cameras :)
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16:32 | rexbron | Bertl: allows for starting and stopping the rec function of a camera via a remote focus device. Since LANC is a serial protocol, it needed to be a little electronic adapter that listened for a switch on one side and sent out a lanc command on the other
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16:32 | rexbron | Bertl: the Canon 7D but that footage was from 2010 when DSLRs were a new thing ;)
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16:33 | Bertl | I see LANC is a proprietary? interface created by Sony for their eqippment
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16:34 | rexbron | not really propritary, just no official documentation. The protocol was reverse engineered off the wire
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16:34 | rexbron | Canon and Blackmagic both use LANC but call it something else
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16:34 | Bertl | not surprising with 9600n8
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16:35 | rexbron | Bertl: refering to baud?
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16:35 | Bertl | yup
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16:35 | Bertl | and that failed in what way?
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16:35 | Bertl | sounds rather straight forward to me, today probably a job for a raspberry pi
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16:36 | rexbron | Bertl: I think the adapter would get out of sync with the camera
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16:36 | rexbron | but I have no EE background
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16:37 | Bertl | okay, probably a minor issue then
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16:37 | rexbron | I implimented it on an Atmel Atiny85 in an Ardunio environment
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16:38 | rexbron | Bertl: for you ;) for me, I just kinda shrugged and had to walk away from the project. I can't sell something I don't understand
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16:38 | rexbron | but they were used on Need for Speed
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16:39 | Bertl | did you open source the project?
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16:39 | rexbron | no but I could
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16:40 | Bertl | I guess somebody would identify the issue pretty soon and fix it
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16:40 | rexbron | maybe but they would need hardware infront of them
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16:40 | Bertl | especially if you explain what goes wrong where
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16:40 | rexbron | I would think
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16:41 | Bertl | I guess so, especially if it is special hardware
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16:41 | Bertl | but sounded more like an arduino with a few cables :)
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16:41 | rexbron | not super special, the initial dev board was an arduino :)
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16:41 | rexbron | its mostly that I designed a custom pcb to reduce size
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16:42 | rexbron | (also a first for me)
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16:42 | rexbron | the first 10 units took me 8 hours to hand solder
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16:42 | Bertl | so if the code works for an unmodified arduino, I guess folks interested will have the hardware available
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16:43 | rexbron | Bertl: provided they have a Canon C300 to test on. The othe reason I walked away was PLC electronics made the same thing (after I did) and did it better lol
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16:44 | Bertl | happens
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16:44 | Bertl | so any specific parts of axiom (alpha) you are interested in or you would like to help with?
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16:45 | rexbron | ergonomics ;)
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16:45 | rexbron | bbl, just got a call for a rental I need to deliver
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16:46 | Bertl | okay, I'm leaving shortly, but I should be back in 90 minutes
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17:06 | se6astian | good evening
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17:08 | Bertl | evening ... I'm off now .. back in 90 or so ...
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18:03 | se6astian | preparing a new article
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18:03 | se6astian | https://www.apertus.org/apertus-now-accepts-bitcoins
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18:04 | se6astian | does anyone have a bitcoin wallet and send me some tiny amount?
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18:04 | se6astian | I dont want to announce this before I have seen it actually working at least once :)
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18:04 | se6astian | *and can send me...
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18:12 | philippejadin | I don't have any bitcoin money ...
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18:12 | philippejadin | how do you convert those donation to money? Do we even do that ?
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18:15 | se6astian | there is an echange service
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18:15 | philippejadin | ok, just saw that you can convert to local money. Weird stuff :-)
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18:15 | se6astian | its basically a foreign currency
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18:15 | se6astian | with quite huge value fluctuations currently
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18:15 | se6astian | its an experiment
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18:15 | se6astian | not that we will gather a huge amount of donations that way
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18:15 | se6astian | its more the message that we want to be part of this
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19:22 | Bertl | back now ...
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19:23 | Bertl | the fluctuations are not the huge anymore, btw
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19:24 | Bertl | and the value is still increasing, so it makes perfect sense to allow that
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19:25 | se6astian | when I checked the value last week it was around 200 $, now its around 300$
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19:25 | se6astian | did you ever take a look at the mining process
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19:26 | se6astian | I was quite surprised when I saw that people designed entire ASICS and FPGA stacks just for mining bitcoins
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19:27 | Bertl | yep
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19:28 | se6astian | 5000$ http://www.butterflylabs.com/monarch/
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19:35 | rexbron | Bertl: to pick up where we left off, I can offer real world production shooting experience as both a DP and AC.
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19:36 | Bertl | sounds good, but at the moment, we have just a single prototype with a broken sensor
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19:36 | Bertl | (there will be a second one soon to shoot actual footage)
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20:49 | se6astian | ok, time for bed
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20:49 | se6astian | good n8!
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21:01 | [1]Sasha | Good morning everyone :)
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21:07 | Bertl | morning [1]Sasha!
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21:08 | Bertl | rexbron: nevertheless, I appreciate addition information and comments during development ... so hang around and join whenever you think you can add something
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21:08 | Bertl | *additional
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