09:47 | Bertl | morning everyone!
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10:12 | se6astian | joined the channel | |
10:12 | Bertl | hello se6astian!
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10:12 | se6astian | Good morning!
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10:14 | se6astian | are you confident enough with the SFE that you can say we will definitely be able to get images from it - if that is the case I will post about the SFE being hardware complete
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10:15 | se6astian | or I guess > 80% certainty would be enough :)
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10:15 | Bertl | I don't see why we shouldn't get images unless the sensor chip is broken and doesn't send any image at all ... but I have no idea what quality the images will be
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10:15 | se6astian | thats fine :)
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10:15 | se6astian | next question is timing
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10:15 | Bertl | just to make an argument here:
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10:16 | se6astian | we will have big media attention tomorrow
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10:16 | Bertl | we have 32 LVD lines connected, in the worst case, we need only 4 of them to get a picture
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10:16 | se6astian | so it might be best to wait until mid week to post another update
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10:16 | Bertl | *LVDS
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10:16 | se6astian | ah yes, thats right
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10:16 | Bertl | connectivity for all 32 lines has been checked already
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10:17 | Bertl | and we already received the LVDS clock back (going through the sensor)
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10:17 | se6astian | perfect, was about to ask about electrical connectivity
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10:17 | se6astian | sounds good enough for me :)
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10:17 | Bertl | what will be the big media attention?
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10:18 | Bertl | (the modular concept or?)
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10:18 | se6astian | yes
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10:18 | se6astian | tomorow 19:00
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10:18 | se6astian | this could potentially be huge!
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10:18 | Bertl | sounds good to me, just don't forget about the prototype
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10:19 | se6astian | how do you mean "forget"?
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10:19 | Bertl | in my experience, it has been too silent to keep the momentum already
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10:19 | se6astian | ah sure
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10:19 | Bertl | i.e. it looks like the PCBs are routed and we are waiting
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10:20 | se6astian | well 2 options
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10:20 | Bertl | (or even worse, judgin from a few pages, we are not even working on it)
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10:20 | Bertl | *judging
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10:20 | se6astian | wait for the big crowd tomorrow and then add something shortly afterwards about the prototype (wednesday)
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10:20 | se6astian | or post about the prototype today so the big crowd tomorrow already is able to see it
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10:22 | Bertl | don't get me wrong, I'm all fine with working undisturbed and undistracted, but that doesn't attract attention at all :)
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10:22 | se6astian | I posted about the HDMI pogress yesterday
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10:23 | se6astian | 568 facebook views already
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10:23 | Bertl | yes, I'm just saying, don't take it as criticism, just google for axiom alpha and see what pages you hit
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10:23 | Bertl | (and try to puzzle a picture together what the current status is :)
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10:24 | Bertl | i.e. imagine you are somebody who watched apertus/axiom like a year ago, and heard something that progress is ongoing and wants to figure out what we are doing
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10:25 | se6astian | ah yes good idea, I will add something to the mini sites that links/includes newsposts on apertus.org
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10:25 | Bertl | now use a search engine to get the information
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10:38 | se6astian | will take care of that
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10:38 | se6astian | thanks
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11:14 | se6astian | done: http://axiom.apertus.org/index.php?site=alpha
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11:58 | se6astian | related news added, updated images
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11:58 | se6astian | updated text
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12:48 | se6astian | Bertl, first draft of article complete, please take a look: https://www.apertus.org/axiom-alpha-hardware-complete?update
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12:48 | se6astian | will head out for a walk now
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12:52 | Bertl | ok, have fun!
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16:37 | se6astian | joined the channel | |
16:37 | Bertl | ad draft (a few comments):
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16:38 | Bertl | first, there is only one reflow step (and that one wasn't done in the reflow oven)
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16:39 | Bertl | then, basically all parts except the FMC connector were hand soldered
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16:39 | Bertl | the actual build/test process is interleaved, so the steps to build the adapter are basically:
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16:40 | Bertl | 1) solder inner capacitors on FMC side (because they become unreachable)
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16:40 | Bertl | 2) reflow FMC connector (done on hot plate)
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16:40 | Bertl | 3) solder on remaining capacitors
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16:41 | Bertl | 4) detailed connectivity tests with 3.3V on the zedboard (special diagnose software)
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16:41 | Bertl | 5) solder on I2C parts
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16:41 | Bertl | 6) test of I2C components
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16:42 | Bertl | 7) solder on remaining connectors and LDO(s)
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16:42 | Bertl | 8) voltage tests with 1.8V on the zedboard
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16:43 | Bertl | 9) solder Sensor Socket and repeat connectivity tests with 3.3V
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16:44 | Bertl | and of course, the pmod cable has to be built as well, but that happened between 3 and 4, as it is needed for the connectivity tests
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16:46 | se6astian | thanks, will update the post
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16:47 | Bertl | np, thanks for updating!
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16:53 | se6astian | updated: https://www.apertus.org/axiom-alpha-hardware-complete?update2
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16:53 | se6astian | I greatly simplified the procedure in the text :)
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16:54 | Bertl | yeah, looks good
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16:54 | se6astian | great, I will ask sasha again to review the text
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16:54 | se6astian | and maybe release it tomorrow during the day
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16:54 | se6astian | before the big release at 19:00
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16:55 | Bertl | excellent!
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18:05 | se6astian | btw I hope you dont mind that I always write "we" in newsposts but actually you are doing all the work :)
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18:42 | Bertl | nope, that's fine
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21:03 | se6astian | ok going to bed, good night!
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21:03 | se6astian | please think about my donation mail
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