Current Server Time: 19:48 (Central Europe)

#apertus IRC Channel Logs

2013/10/06

Timezone: UTC


10:47
Bertl
morning everyone!
11:12
se6astian
joined the channel
11:12
Bertl
hello se6astian!
11:12
se6astian
Good morning!
11:14
se6astian
are you confident enough with the SFE that you can say we will definitely be able to get images from it - if that is the case I will post about the SFE being hardware complete
11:15
se6astian
or I guess > 80% certainty would be enough :)
11:15
Bertl
I don't see why we shouldn't get images unless the sensor chip is broken and doesn't send any image at all ... but I have no idea what quality the images will be
11:15
se6astian
thats fine :)
11:15
se6astian
next question is timing
11:15
Bertl
just to make an argument here:
11:16
se6astian
we will have big media attention tomorrow
11:16
Bertl
we have 32 LVD lines connected, in the worst case, we need only 4 of them to get a picture
11:16
se6astian
so it might be best to wait until mid week to post another update
11:16
Bertl
*LVDS
11:16
se6astian
ah yes, thats right
11:16
Bertl
connectivity for all 32 lines has been checked already
11:17
Bertl
and we already received the LVDS clock back (going through the sensor)
11:17
se6astian
perfect, was about to ask about electrical connectivity
11:17
se6astian
sounds good enough for me :)
11:17
Bertl
what will be the big media attention?
11:18
Bertl
(the modular concept or?)
11:18
se6astian
yes
11:18
se6astian
tomorow 19:00
11:18
se6astian
this could potentially be huge!
11:18
Bertl
sounds good to me, just don't forget about the prototype
11:19
se6astian
how do you mean "forget"?
11:19
Bertl
in my experience, it has been too silent to keep the momentum already
11:19
se6astian
ah sure
11:19
Bertl
i.e. it looks like the PCBs are routed and we are waiting
11:20
se6astian
well 2 options
11:20
Bertl
(or even worse, judgin from a few pages, we are not even working on it)
11:20
Bertl
*judging
11:20
se6astian
wait for the big crowd tomorrow and then add something shortly afterwards about the prototype (wednesday)
11:20
se6astian
or post about the prototype today so the big crowd tomorrow already is able to see it
11:22
Bertl
don't get me wrong, I'm all fine with working undisturbed and undistracted, but that doesn't attract attention at all :)
11:22
se6astian
I posted about the HDMI pogress yesterday
11:23
se6astian
568 facebook views already
11:23
Bertl
yes, I'm just saying, don't take it as criticism, just google for axiom alpha and see what pages you hit
11:23
Bertl
(and try to puzzle a picture together what the current status is :)
11:24
Bertl
i.e. imagine you are somebody who watched apertus/axiom like a year ago, and heard something that progress is ongoing and wants to figure out what we are doing
11:25
se6astian
ah yes good idea, I will add something to the mini sites that links/includes newsposts on apertus.org
11:25
Bertl
now use a search engine to get the information
11:38
se6astian
will take care of that
11:38
se6astian
thanks
12:14
se6astian
done: http://axiom.apertus.org/index.php?site=alpha
12:58
se6astian
related news added, updated images
12:58
se6astian
updated text
13:01
[1]se6astian
joined the channel
13:02
se6astian
left the channel
13:02
[1]se6astian
changed nick to: se6astian
13:48
se6astian
Bertl, first draft of article complete, please take a look: https://www.apertus.org/axiom-alpha-hardware-complete?update
13:48
se6astian
will head out for a walk now
13:52
Bertl
ok, have fun!
13:53
se6astian
left the channel
17:37
se6astian
joined the channel
17:37
Bertl
ad draft (a few comments):
17:38
Bertl
first, there is only one reflow step (and that one wasn't done in the reflow oven)
17:39
Bertl
then, basically all parts except the FMC connector were hand soldered
17:39
Bertl
the actual build/test process is interleaved, so the steps to build the adapter are basically:
17:40
Bertl
1) solder inner capacitors on FMC side (because they become unreachable)
17:40
Bertl
2) reflow FMC connector (done on hot plate)
17:40
Bertl
3) solder on remaining capacitors
17:41
Bertl
4) detailed connectivity tests with 3.3V on the zedboard (special diagnose software)
17:41
Bertl
5) solder on I2C parts
17:41
Bertl
6) test of I2C components
17:42
Bertl
7) solder on remaining connectors and LDO(s)
17:42
Bertl
8) voltage tests with 1.8V on the zedboard
17:43
Bertl
9) solder Sensor Socket and repeat connectivity tests with 3.3V
17:44
Bertl
and of course, the pmod cable has to be built as well, but that happened between 3 and 4, as it is needed for the connectivity tests
17:45
se6astian
left the channel
17:46
se6astian
joined the channel
17:46
se6astian
thanks, will update the post
17:47
Bertl
np, thanks for updating!
17:53
se6astian
updated: https://www.apertus.org/axiom-alpha-hardware-complete?update2
17:53
se6astian
I greatly simplified the procedure in the text :)
17:54
Bertl
yeah, looks good
17:54
se6astian
great, I will ask sasha again to review the text
17:54
se6astian
and maybe release it tomorrow during the day
17:54
se6astian
before the big release at 19:00
17:55
Bertl
excellent!
19:05
se6astian
btw I hope you dont mind that I always write "we" in newsposts but actually you are doing all the work :)
19:42
Bertl
nope, that's fine
22:03
se6astian
ok going to bed, good night!
22:03
se6astian
please think about my donation mail
22:03
se6astian
left the channel