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#apertus IRC Channel Logs

2015/10/03

Timezone: UTC


01:13
irieger
Ah, thx. Thats the image I saw multiple times but wasn't finding again ...
01:18
irieger
Ok. So all relevant for me is in FPGA. Nice ...
01:19
Bertl
yup, the arm cores are just doing configuration and setup
01:19
irieger
I'd be fine with C, CUDA, OpenCL etc. but this vhd stuff is totally new ...
01:20
irieger
I knew how FPGAs work but haven't thought about it till now ...
01:20
irieger
Meaning that it isn't programming in the classical terms
01:20
Bertl
it isn't that complicated, you just have to let go of the "normal" programming concepts
01:21
irieger
Sounds good. Have too look at this soon.
01:23
irieger
I see that LUTs are used for linearization and gamma in the flow chart. Would this be generally possible with formulas instead of LUTs or is this likely more performance-hitting on the FPGA? (I know this is kind of a bit generalized)
01:25
irieger
Do you have a good online resource for VHD/FPGA learning?
01:26
irieger
Btw. anyone here familiar with board construction willing to build a 4K LUT Box? Would be a nice project for some open hardware. There isn't even one of the commercial lut box vendors offering one for 4K ...
01:26
fsteinel
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01:27
Bertl
there are a huge number of courses and introductions online, but the really good stuff is in (mostly older) books
01:27
irieger
You know some good ones? Maybe we have something in our library at university.
01:28
irieger
Best thing there is that more and more books are even available online for free. Some even as full book PDF files, maybe I'm lucky
01:28
Bertl
VHDL programming by example was nice to read (Perry, IIRC)
01:30
irieger
Can't find this one but there are at least 9 ebooks about VHDL
01:30
Bertl
then the Designer's Guide to VHDL
01:31
irieger
that one is available
01:31
Bertl
ah, I found one online resource (freely available)
01:31
Bertl
http://freerangefactory.org/books_tuts.html
01:31
Bertl
Free Range VHDL
01:32
Bertl
for coding techniques, there is also Essential VHDL: RTL Synthesis Done Right
01:34
Bertl
what do you consider a 4k LUT box?
01:35
irieger
Would like to have one to drive my grading monitor. It's a "cheap" one which needs a LUT to get some decent results. Would like to have a LUT box for 4K monitoring to make full use of my system here
01:36
Bertl
define LUT :)
01:36
Bertl
also, what is the interface to the monitor
01:38
irieger
Input HDMI or preferably SDI, output HDMI or display port for this case or preferably SDI so it can be used before the SDI->HDMI converter Box. Two outputs would be fine. One pass through, one with LUT applied ;-)
01:39
Bertl
so it should also work as protocol converter then
01:39
irieger
LUT = at least 33x33x33, better 65x65x65 sized 3D lookup tables ;-)
01:39
irieger
*getting greedy* ;-)
01:39
Bertl
so also 3D luts with interpolation :)
01:39
irieger
Bertl: no, pure SDI would be better I'd say
01:40
irieger
yeah, wouldn't really work without I think ;-)
01:41
irieger
I'd like to try one of the many 4K recorders/monitors like Atomos, Video devices and so on to see how good they would work and how precise they'd be.
01:41
Bertl
and you are looking for somebody to build the hardware or hardware and software?
01:42
irieger
We have a PIX-E5 at our universityso maybe I can try with it
01:43
irieger
Depending on the complexity of the software needed (which depends on the hardware I think) ;-) But wouldn't really have time for such a project even if it would be nice.
01:56
Bertl
well, if I hear from somebody interested in doing that, I'll let you know
02:09
irieger
Ok
02:11
irieger
good night
02:11
Bertl
nn
03:46
Bertl
off to bed now ... have a good one everyone!
03:46
Bertl
changed nick to: Bertl_zZ
04:51
comradekingu
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08:36
mithro
irieger: it might be possible to do what you want with the Opsis board
08:36
mithro
irieger: it would be pushing it to the limit, but it could possibly work
08:47
Bertl_zZ
changed nick to: Bertl
08:47
Bertl
morning folks!
08:49
Bertl
mithro: 33^3 3D lookup tables with interpolation is probably outside the range of the opsis, especially at 4k speeds ... but I would love to see something like that implemented on it.
08:50
mithro
Bertl: 33x33x33 isn't bad, 33bit x 33bit x 33bit is :P
08:50
Bertl
I think what irieger meant was 33 point per color channel
08:51
Bertl
so you need 33^3 * 12 or 16 bits memory
08:51
Bertl
plus some kind of interpolation between 2-3 points fetched per channel
08:53
mithro
Bertl: hrm - 33^3 * 12bits is only ~64kbytes according to wolfram alpha?
08:54
Bertl
yes, but you need to look up at least 6 values in those 64k for each channel at ~300MHz
08:55
Bertl
and then interpolate between those to form the results
08:55
Bertl
but yeah, maybe the Opsis can do that, haven't checked yet, you probably know better than I
08:56
mithro
Bertl: it would definitely be tough
08:56
mithro
Bertl: You are going to use up a lot of your FPGA space replicating the lerp block so you can do a bunch of pixels at the time
08:57
mithro
Bertl: all your block ram you'll need to use as a cache for the table data stored in the DDR ram
08:58
mithro
Bertl: getting it all to fit is going to be a constant game of trade offs
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13:55
Bertl
off for now ... bbl
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Bertl
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