| 00:13 | irieger | Ah, thx. Thats the image I saw multiple times but wasn't finding again ...
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| 00:18 | irieger | Ok. So all relevant for me is in FPGA. Nice ...
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| 00:19 | Bertl | yup, the arm cores are just doing configuration and setup
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| 00:19 | irieger | I'd be fine with C, CUDA, OpenCL etc. but this vhd stuff is totally new ...
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| 00:20 | irieger | I knew how FPGAs work but haven't thought about it till now ...
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| 00:20 | irieger | Meaning that it isn't programming in the classical terms
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| 00:20 | Bertl | it isn't that complicated, you just have to let go of the "normal" programming concepts
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| 00:21 | irieger | Sounds good. Have too look at this soon.
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| 00:23 | irieger | I see that LUTs are used for linearization and gamma in the flow chart. Would this be generally possible with formulas instead of LUTs or is this likely more performance-hitting on the FPGA? (I know this is kind of a bit generalized)
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| 00:25 | irieger | Do you have a good online resource for VHD/FPGA learning?
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| 00:26 | irieger | Btw. anyone here familiar with board construction willing to build a 4K LUT Box? Would be a nice project for some open hardware. There isn't even one of the commercial lut box vendors offering one for 4K ...
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| 00:27 | Bertl | there are a huge number of courses and introductions online, but the really good stuff is in (mostly older) books
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| 00:27 | irieger | You know some good ones? Maybe we have something in our library at university.
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| 00:28 | irieger | Best thing there is that more and more books are even available online for free. Some even as full book PDF files, maybe I'm lucky
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| 00:28 | Bertl | VHDL programming by example was nice to read (Perry, IIRC)
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| 00:30 | irieger | Can't find this one but there are at least 9 ebooks about VHDL
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| 00:30 | Bertl | then the Designer's Guide to VHDL
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| 00:31 | irieger | that one is available
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| 00:31 | Bertl | ah, I found one online resource (freely available)
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| 00:31 | Bertl | http://freerangefactory.org/books_tuts.html
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| 00:31 | Bertl | Free Range VHDL
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| 00:32 | Bertl | for coding techniques, there is also Essential VHDL: RTL Synthesis Done Right
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| 00:34 | Bertl | what do you consider a 4k LUT box?
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| 00:35 | irieger | Would like to have one to drive my grading monitor. It's a "cheap" one which needs a LUT to get some decent results. Would like to have a LUT box for 4K monitoring to make full use of my system here
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| 00:36 | Bertl | define LUT :)
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| 00:36 | Bertl | also, what is the interface to the monitor
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| 00:38 | irieger | Input HDMI or preferably SDI, output HDMI or display port for this case or preferably SDI so it can be used before the SDI->HDMI converter Box. Two outputs would be fine. One pass through, one with LUT applied ;-)
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| 00:39 | Bertl | so it should also work as protocol converter then
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| 00:39 | irieger | LUT = at least 33x33x33, better 65x65x65 sized 3D lookup tables ;-)
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| 00:39 | irieger | *getting greedy* ;-)
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| 00:39 | Bertl | so also 3D luts with interpolation :)
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| 00:39 | irieger | Bertl: no, pure SDI would be better I'd say
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| 00:40 | irieger | yeah, wouldn't really work without I think ;-)
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| 00:41 | irieger | I'd like to try one of the many 4K recorders/monitors like Atomos, Video devices and so on to see how good they would work and how precise they'd be.
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| 00:41 | Bertl | and you are looking for somebody to build the hardware or hardware and software?
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| 00:42 | irieger | We have a PIX-E5 at our universityso maybe I can try with it
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| 00:43 | irieger | Depending on the complexity of the software needed (which depends on the hardware I think) ;-) But wouldn't really have time for such a project even if it would be nice.
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| 00:56 | Bertl | well, if I hear from somebody interested in doing that, I'll let you know
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| 01:09 | irieger | Ok
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| 01:11 | irieger | good night
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| 01:11 | Bertl | nn
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| 02:46 | Bertl | off to bed now ... have a good one everyone!
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| 07:36 | mithro | irieger: it might be possible to do what you want with the Opsis board
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| 07:36 | mithro | irieger: it would be pushing it to the limit, but it could possibly work
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| 07:47 | Bertl | morning folks!
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| 07:49 | Bertl | mithro: 33^3 3D lookup tables with interpolation is probably outside the range of the opsis, especially at 4k speeds ... but I would love to see something like that implemented on it.
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| 07:50 | mithro | Bertl: 33x33x33 isn't bad, 33bit x 33bit x 33bit is :P
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| 07:50 | Bertl | I think what irieger meant was 33 point per color channel
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| 07:51 | Bertl | so you need 33^3 * 12 or 16 bits memory
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| 07:51 | Bertl | plus some kind of interpolation between 2-3 points fetched per channel
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| 07:53 | mithro | Bertl: hrm - 33^3 * 12bits is only ~64kbytes according to wolfram alpha?
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| 07:54 | Bertl | yes, but you need to look up at least 6 values in those 64k for each channel at ~300MHz
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| 07:55 | Bertl | and then interpolate between those to form the results
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| 07:55 | Bertl | but yeah, maybe the Opsis can do that, haven't checked yet, you probably know better than I
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| 07:56 | mithro | Bertl: it would definitely be tough
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| 07:56 | mithro | Bertl: You are going to use up a lot of your FPGA space replicating the lerp block so you can do a bunch of pixels at the time
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| 07:57 | mithro | Bertl: all your block ram you'll need to use as a cache for the table data stored in the DDR ram
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| 07:58 | mithro | Bertl: getting it all to fit is going to be a constant game of trade offs
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